class X86SelectionDAGInfo

Declaration

class X86SelectionDAGInfo : public SelectionDAGTargetInfo { /* full declaration omitted */ };

Description

Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process.

Declared at: llvm/lib/Target/X86/X86SelectionDAGInfo.h:20

Inherits from: SelectionDAGTargetInfo

Method Overview

• public llvm::SDValue EmitTargetCodeForMemcpy(llvm::SelectionDAG & DAG, const llvm::SDLoc & dl, llvm::SDValue Chain, llvm::SDValue Dst, llvm::SDValue Src, llvm::SDValue Size, llvm::Align Alignment, bool isVolatile, bool AlwaysInline, llvm::MachinePointerInfo DstPtrInfo, llvm::MachinePointerInfo SrcPtrInfo) const
• public llvm::SDValue EmitTargetCodeForMemset(llvm::SelectionDAG & DAG, const llvm::SDLoc & dl, llvm::SDValue Chain, llvm::SDValue Dst, llvm::SDValue Src, llvm::SDValue Size, llvm::Align Alignment, bool isVolatile, bool AlwaysInline, llvm::MachinePointerInfo DstPtrInfo) const
• public X86SelectionDAGInfo()
• private bool isBaseRegConflictPossible(llvm::SelectionDAG & DAG, ArrayRef<llvm::MCPhysReg> ClobberSet) const

Inherited from SelectionDAGTargetInfo:

• public EmitTargetCodeForMemchr
• public EmitTargetCodeForMemcmp
• public EmitTargetCodeForMemcpy
• public EmitTargetCodeForMemmove
• public EmitTargetCodeForMemset
• public EmitTargetCodeForSetTag
• public EmitTargetCodeForStrcmp
• public EmitTargetCodeForStrcpy
• public EmitTargetCodeForStrlen
• public EmitTargetCodeForStrnlen
• public disableGenericCombines

Methods

¶llvm::SDValue EmitTargetCodeForMemcpy(
    llvm::SelectionDAG& DAG,
    const llvm::SDLoc& dl,
    llvm::SDValue Chain,
    llvm::SDValue Dst,
    llvm::SDValue Src,
    llvm::SDValue Size,
    llvm::Align Alignment,
    bool isVolatile,
    bool AlwaysInline,
    llvm::MachinePointerInfo DstPtrInfo,
    llvm::MachinePointerInfo SrcPtrInfo) const

Description

Emit target-specific code that performs a memcpy. This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple loads/stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used. If AlwaysInline is true, the size is constant and the target should not emit any calls and is strongly encouraged to attempt to emit inline code even if it is beyond the usual threshold because this intrinsic is being expanded in a place where calls are not feasible (e.g. within the prologue for another call). If the target chooses to decline an AlwaysInline request here, legalize will resort to using simple loads and stores.

Declared at: llvm/lib/Target/X86/X86SelectionDAGInfo.h:35

Parameters

llvm::SelectionDAG& DAG

const llvm::SDLoc& dl

llvm::SDValue Chain

llvm::SDValue Dst

llvm::SDValue Src

llvm::SDValue Size

llvm::Align Alignment

bool isVolatile

bool AlwaysInline

llvm::MachinePointerInfo DstPtrInfo

llvm::MachinePointerInfo SrcPtrInfo

¶llvm::SDValue EmitTargetCodeForMemset(
    llvm::SelectionDAG& DAG,
    const llvm::SDLoc& dl,
    llvm::SDValue Chain,
    llvm::SDValue Dst,
    llvm::SDValue Src,
    llvm::SDValue Size,
    llvm::Align Alignment,
    bool isVolatile,
    bool AlwaysInline,
    llvm::MachinePointerInfo DstPtrInfo) const

Description

Emit target-specific code that performs a memset. This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used. Note that if AlwaysInline is true the function has to return a valid SDValue.

Declared at: llvm/lib/Target/X86/X86SelectionDAGInfo.h:29

Parameters

llvm::SelectionDAG& DAG

const llvm::SDLoc& dl

llvm::SDValue Chain

llvm::SDValue Dst

llvm::SDValue Src

llvm::SDValue Size

llvm::Align Alignment

bool isVolatile

bool AlwaysInline

llvm::MachinePointerInfo DstPtrInfo

¶X86SelectionDAGInfo()

Declared at: llvm/lib/Target/X86/X86SelectionDAGInfo.h:27

¶bool isBaseRegConflictPossible(
    llvm::SelectionDAG& DAG,
    ArrayRef<llvm::MCPhysReg> ClobberSet) const

Description

Returns true if it is possible for the base register to conflict with the given set of clobbers for a memory intrinsic.

Declared at: llvm/lib/Target/X86/X86SelectionDAGInfo.h:23

Parameters

llvm::SelectionDAG& DAG

ArrayRef<llvm::MCPhysReg> ClobberSet