class ScheduleDAGSDNodes
Declaration
class ScheduleDAGSDNodes : public ScheduleDAG { /* full declaration omitted */ };
Description
ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs. Edges between SUnits are initially based on edges in the SelectionDAG, and additional edges can be added by the schedulers as heuristics. SDNodes such as Constants, Registers, and a few others that are not interesting to schedulers are not allocated SUnits. SDNodes with MVT::Glue operands are grouped along with the flagged nodes into a single SUnit so that they are scheduled together. SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output edges. Physical register dependence information is not carried in the DAG and must be handled explicitly by schedulers.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:46
Inherits from: ScheduleDAG
Member Variables
- public llvm::MachineBasicBlock* BB = nullptr
- public llvm::SelectionDAG* DAG = nullptr
- public const llvm::InstrItineraryData* InstrItins
- public std::vector<SUnit*> Sequence
- The schedule. Null SUnit*'s represent noop instructions.
Inherited from ScheduleDAG:
- public TM
- public TII
- public TRI
- public MF
- public MRI
- public SUnits
- public EntrySU
- public ExitSU
- public StressSched
Method Overview
- private void AddSchedEdges()
- public void BuildSchedGraph(llvm::AAResults * AA)
- private void BuildSchedUnits()
- public llvm::SUnit * Clone(llvm::SUnit * Old)
- private void ClusterNeighboringLoads(llvm::SDNode * Node)
- private void ClusterNodes()
- private void EmitPhysRegCopy(llvm::SUnit * SU, DenseMap<llvm::SUnit *, llvm::Register> & VRBaseMap, MachineBasicBlock::iterator InsertPos)
- public virtual llvm::MachineBasicBlock * EmitSchedule(MachineBasicBlock::iterator & InsertPos)
- public void InitNumRegDefsLeft(llvm::SUnit * SU)
- public void Run(llvm::SelectionDAG * dag, llvm::MachineBasicBlock * bb)
- public virtual void Schedule()
- public ScheduleDAGSDNodes(llvm::MachineFunction & mf)
- public void VerifyScheduledSequence(bool isBottomUp)
- public virtual void computeLatency(llvm::SUnit * SU)
- public virtual void computeOperandLatency(llvm::SDNode * Def, llvm::SDNode * Use, unsigned int OpIdx, llvm::SDep & dep) const
- public void dump() const
- public void dumpNode(const llvm::SUnit & SU) const
- public void dumpSchedule() const
- protected virtual bool forceUnitLatencies() const
- public virtual void getCustomGraphFeatures(GraphWriter<llvm::ScheduleDAG *> & GW) const
- public std::string getDAGName() const
- public std::string getGraphNodeLabel(const llvm::SUnit * SU) const
- public static bool isPassiveNode(llvm::SDNode * Node)
- public llvm::SUnit * newSUnit(llvm::SDNode * N)
- public ~ScheduleDAGSDNodes()
Inherited from ScheduleDAG:
- public VerifyScheduledDAG
- public addCustomGraphFeatures
- public clearDAG
- public dump
- public dumpNode
- protected dumpNodeAll
- public dumpNodeName
- public getDAGName
- public getGraphNodeLabel
- public getInstrDesc
- public viewGraph
- public viewGraph
Methods
¶void AddSchedEdges()
void AddSchedEdges()
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:185
¶void BuildSchedGraph(llvm::AAResults* AA)
void BuildSchedGraph(llvm::AAResults* AA)
Description
BuildSchedGraph - Build the SUnit graph from the selection dag that we are input. This SUnit graph is similar to the SelectionDAG, but excludes nodes that aren't interesting to scheduling, and represents flagged together nodes with a single SUnit.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:97
Parameters
- llvm::AAResults* AA
¶void BuildSchedUnits()
void BuildSchedUnits()
Description
BuildSchedUnits, AddSchedEdges - Helper functions for BuildSchedGraph.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:184
¶llvm::SUnit* Clone(llvm::SUnit* Old)
llvm::SUnit* Clone(llvm::SUnit* Old)
Description
Clone - Creates a clone of the specified SUnit. It does not copy the predecessors / successors info nor the temporary scheduling states.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:91
Parameters
- llvm::SUnit* Old
¶void ClusterNeighboringLoads(llvm::SDNode* Node)
void ClusterNeighboringLoads(llvm::SDNode* Node)
Description
ClusterNeighboringLoads - Cluster loads from "near" addresses into combined SUnits.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:178
Parameters
- llvm::SDNode* Node
¶void ClusterNodes()
void ClusterNodes()
Description
ClusterNodes - Cluster certain nodes which should be scheduled together.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:181
¶void EmitPhysRegCopy(
llvm::SUnit* SU,
DenseMap<llvm::SUnit*, llvm::Register>&
VRBaseMap,
MachineBasicBlock::iterator InsertPos)
void EmitPhysRegCopy(
llvm::SUnit* SU,
DenseMap<llvm::SUnit*, llvm::Register>&
VRBaseMap,
MachineBasicBlock::iterator InsertPos)
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:187
Parameters
- llvm::SUnit* SU
- DenseMap<llvm::SUnit*, llvm::Register>& VRBaseMap
- MachineBasicBlock::iterator InsertPos
¶virtual llvm::MachineBasicBlock* EmitSchedule(
MachineBasicBlock::iterator& InsertPos)
virtual llvm::MachineBasicBlock* EmitSchedule(
MachineBasicBlock::iterator& InsertPos)
Description
EmitSchedule - Insert MachineInstrs into the MachineBasicBlock according to the order specified in Sequence.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:123
Parameters
- MachineBasicBlock::iterator& InsertPos
¶void InitNumRegDefsLeft(llvm::SUnit* SU)
void InitNumRegDefsLeft(llvm::SUnit* SU)
Description
InitNumRegDefsLeft - Determine the # of regs defined by this node.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:101
Parameters
- llvm::SUnit* SU
¶void Run(llvm::SelectionDAG* dag,
llvm::MachineBasicBlock* bb)
void Run(llvm::SelectionDAG* dag,
llvm::MachineBasicBlock* bb)
Description
Run - perform scheduling.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:61
Parameters
¶virtual void Schedule()
virtual void Schedule()
Description
Schedule - Order nodes according to selected style, filling in the Sequence member.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:113
¶ScheduleDAGSDNodes(llvm::MachineFunction& mf)
ScheduleDAGSDNodes(llvm::MachineFunction& mf)
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:55
Parameters
¶void VerifyScheduledSequence(bool isBottomUp)
void VerifyScheduledSequence(bool isBottomUp)
Description
VerifyScheduledSequence - Verify that all SUnits are scheduled and consistent with the Sequence of scheduled instructions.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:117
Parameters
- bool isBottomUp
¶virtual void computeLatency(llvm::SUnit* SU)
virtual void computeLatency(llvm::SUnit* SU)
Description
computeLatency - Compute node latency.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:105
Parameters
- llvm::SUnit* SU
¶virtual void computeOperandLatency(
llvm::SDNode* Def,
llvm::SDNode* Use,
unsigned int OpIdx,
llvm::SDep& dep) const
virtual void computeOperandLatency(
llvm::SDNode* Def,
llvm::SDNode* Use,
unsigned int OpIdx,
llvm::SDep& dep) const
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:107
Parameters
- llvm::SDNode* Def
- llvm::SDNode* Use
- unsigned int OpIdx
- llvm::SDep& dep
¶void dump() const
void dump() const
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:126
¶void dumpNode(const llvm::SUnit& SU) const
void dumpNode(const llvm::SUnit& SU) const
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:125
Parameters
- const llvm::SUnit& SU
¶void dumpSchedule() const
void dumpSchedule() const
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:127
¶virtual bool forceUnitLatencies() const
virtual bool forceUnitLatencies() const
Description
ForceUnitLatencies - Return true if all scheduling edges should be given a latency value of one. The default is to return false; schedulers may override this as needed.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:173
¶virtual void getCustomGraphFeatures(
GraphWriter<llvm::ScheduleDAG*>& GW) const
virtual void getCustomGraphFeatures(
GraphWriter<llvm::ScheduleDAG*>& GW) const
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:133
Parameters
- GraphWriter<llvm::ScheduleDAG*>& GW
¶std::string getDAGName() const
std::string getDAGName() const
Description
Returns a label for the region of code covered by the DAG.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:131
¶std::string getGraphNodeLabel(
const llvm::SUnit* SU) const
std::string getGraphNodeLabel(
const llvm::SUnit* SU) const
Description
Returns a label for an SUnit node in a visualization of the ScheduleDAG.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:129
Parameters
- const llvm::SUnit* SU
¶static bool isPassiveNode(llvm::SDNode* Node)
static bool isPassiveNode(llvm::SDNode* Node)
Description
isPassiveNode - Return true if the node is a non-scheduled leaf.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:65
Parameters
- llvm::SDNode* Node
¶llvm::SUnit* newSUnit(llvm::SDNode* N)
llvm::SUnit* newSUnit(llvm::SDNode* N)
Description
NewSUnit - Creates a new SUnit and return a ptr to it.
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:86
Parameters
- llvm::SDNode* N
¶~ScheduleDAGSDNodes()
~ScheduleDAGSDNodes()
Declared at: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h:57