class RegisterFile

Declaration

class RegisterFile : public HardwareUnit { /* full declaration omitted */ };

Description

Manages hardware register files, and tracks register definitions for register renaming purposes.

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:83

Inherits from: HardwareUnit

Member Variables

private const llvm::MCRegisterInfo& MRI

private SmallVector<llvm::mca::RegisterFile:: RegisterMappingTracker, 4> RegisterFiles

private std::vector<RegisterMapping> RegisterMappings

private llvm::APInt ZeroRegisters

private unsigned int CurrentCycle

Method Overview

• public RegisterFile(const llvm::MCSchedModel & SM, const llvm::MCRegisterInfo & mri, unsigned int NumRegs = 0)
• private void addRegisterFile(const llvm::MCRegisterFileDesc & RF, ArrayRef<llvm::MCRegisterCostEntry> Entries)
• public void addRegisterRead(llvm::mca::ReadState & RS, const llvm::MCSubtargetInfo & STI) const
• public void addRegisterWrite(llvm::mca::WriteRef Write, MutableArrayRef<unsigned int> UsedPhysRegs)
• private void allocatePhysRegs(const llvm::mca::RegisterFile::RegisterRenamingInfo & Entry, MutableArrayRef<unsigned int> UsedPhysRegs)
• public bool canEliminateMove(const llvm::mca::WriteState & WS, const llvm::mca::ReadState & RS, unsigned int PRFIndex) const
• public llvm::mca::RegisterFile::RAWHazard checkRAWHazards(const llvm::MCSubtargetInfo & STI, const llvm::mca::ReadState & RS) const
• public void collectWrites(const llvm::MCSubtargetInfo & STI, const llvm::mca::ReadState & RS, SmallVectorImpl<llvm::mca::WriteRef> & Writes, SmallVectorImpl<llvm::mca::WriteRef> & CommittedWrites) const
• public void cycleEnd()
• public void cycleStart()
• public void dump() const
• private void freePhysRegs(const llvm::mca::RegisterFile::RegisterRenamingInfo & Entry, MutableArrayRef<unsigned int> FreedPhysRegs)
• public unsigned int getElapsedCyclesFromWriteBack(const llvm::mca::WriteRef & WR) const
• public unsigned int getNumRegisterFiles() const
• private void initialize(const llvm::MCSchedModel & SM, unsigned int NumRegs)
• public unsigned int isAvailable(ArrayRef<llvm::MCPhysReg> Regs) const
• public void onInstructionExecuted(llvm::mca::Instruction * IS)
• public void removeRegisterWrite(const llvm::mca::WriteState & WS, MutableArrayRef<unsigned int> FreedPhysRegs)
• public bool tryEliminateMoveOrSwap(MutableArrayRef<llvm::mca::WriteState> Writes, MutableArrayRef<llvm::mca::ReadState> Reads)

Inherited from HardwareUnit:

Methods

¶RegisterFile(const llvm::MCSchedModel& SM,
             const llvm::MCRegisterInfo& mri,
             unsigned int NumRegs = 0)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:232

Parameters

const llvm::MCSchedModel& SM

const llvm::MCRegisterInfo& mri

unsigned int NumRegs = 0

¶void addRegisterFile(
    const llvm::MCRegisterFileDesc& RF,
    ArrayRef<llvm::MCRegisterCostEntry> Entries)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:212

Parameters

const llvm::MCRegisterFileDesc& RF

ArrayRef<llvm::MCRegisterCostEntry> Entries

¶void addRegisterRead(
    llvm::mca::ReadState& RS,
    const llvm::MCSubtargetInfo& STI) const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:259

Parameters

llvm::mca::ReadState& RS

const llvm::MCSubtargetInfo& STI

¶void addRegisterWrite(
    llvm::mca::WriteRef Write,
    MutableArrayRef<unsigned int> UsedPhysRegs)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:255

Parameters

llvm::mca::WriteRef Write

MutableArrayRef<unsigned int> UsedPhysRegs

¶void allocatePhysRegs(
    const llvm::mca::RegisterFile::
        RegisterRenamingInfo& Entry,
    MutableArrayRef<unsigned int> UsedPhysRegs)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:217

Parameters

const llvm::mca::RegisterFile:: RegisterRenamingInfo& Entry

MutableArrayRef<unsigned int> UsedPhysRegs

¶bool canEliminateMove(
    const llvm::mca::WriteState& WS,
    const llvm::mca::ReadState& RS,
    unsigned int PRFIndex) const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:269

Parameters

const llvm::mca::WriteState& WS

const llvm::mca::ReadState& RS

unsigned int PRFIndex

¶llvm::mca::RegisterFile::RAWHazard
checkRAWHazards(
    const llvm::MCSubtargetInfo& STI,
    const llvm::mca::ReadState& RS) const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:248

Parameters

const llvm::MCSubtargetInfo& STI

const llvm::mca::ReadState& RS

¶void collectWrites(
    const llvm::MCSubtargetInfo& STI,
    const llvm::mca::ReadState& RS,
    SmallVectorImpl<llvm::mca::WriteRef>& Writes,
    SmallVectorImpl<llvm::mca::WriteRef>&
        CommittedWrites) const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:236

Parameters

const llvm::MCSubtargetInfo& STI

const llvm::mca::ReadState& RS

SmallVectorImpl<llvm::mca::WriteRef>& Writes

SmallVectorImpl<llvm::mca::WriteRef>& CommittedWrites

¶void cycleEnd()

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:302

¶void cycleStart()

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:300

¶void dump() const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:305

¶void freePhysRegs(
    const llvm::mca::RegisterFile::
        RegisterRenamingInfo& Entry,
    MutableArrayRef<unsigned int> FreedPhysRegs)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:222

Parameters

const llvm::mca::RegisterFile:: RegisterRenamingInfo& Entry

MutableArrayRef<unsigned int> FreedPhysRegs

¶unsigned int getElapsedCyclesFromWriteBack(
    const llvm::mca::WriteRef& WR) const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:295

Parameters

const llvm::mca::WriteRef& WR

¶unsigned int getNumRegisterFiles() const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:293

¶void initialize(const llvm::MCSchedModel& SM,
                unsigned int NumRegs)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:229

Parameters

const llvm::MCSchedModel& SM

unsigned int NumRegs

¶unsigned int isAvailable(
    ArrayRef<llvm::MCPhysReg> Regs) const

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:290

Parameters

ArrayRef<llvm::MCPhysReg> Regs

¶void onInstructionExecuted(
    llvm::mca::Instruction* IS)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:297

Parameters

llvm::mca::Instruction* IS

¶void removeRegisterWrite(
    const llvm::mca::WriteState& WS,
    MutableArrayRef<unsigned int> FreedPhysRegs)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:264

Parameters

const llvm::mca::WriteState& WS

MutableArrayRef<unsigned int> FreedPhysRegs

¶bool tryEliminateMoveOrSwap(
    MutableArrayRef<llvm::mca::WriteState> Writes,
    MutableArrayRef<llvm::mca::ReadState> Reads)

Declared at: llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h:278

Parameters

MutableArrayRef<llvm::mca::WriteState> Writes

MutableArrayRef<llvm::mca::ReadState> Reads