ΒΆllvm::ScheduleDAGSDNodes*
createILPListDAGScheduler(
    llvm::SelectionDAGISel* IS,
    CodeGenOpt::Level)

Description

createILPListDAGScheduler - This creates a bottom up register pressure aware list scheduler that tries to increase instruction level parallelism in low register pressure mode. In high register pressure mode it schedules to reduce register pressure.

Declared at: llvm/include/llvm/CodeGen/SchedulerRegistry.h:82

Parameters

llvm::SelectionDAGISel* IS
CodeGenOpt::Level