class RegisterClassInfo

Declaration

class RegisterClassInfo { /* full declaration omitted */ };

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:29

Member Variables

private std::unique_ptr<RCInfo[]> RegClass
private unsigned int Tag = 0
private const llvm::MachineFunction* MF = nullptr
private const llvm::TargetRegisterInfo* TRI = nullptr
private const llvm::MCPhysReg* CalleeSavedRegs = nullptr
private SmallVector<llvm::MCPhysReg, 4> CalleeSavedAliases
private llvm::BitVector IgnoreCSRForAllocOrder
private llvm::BitVector Reserved
private std::unique_ptr<unsigned int[]> PSetLimits
private ArrayRef<uint8_t> RegCosts

Method Overview

Methods

RegisterClassInfo()

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:87

void compute(
    const llvm::TargetRegisterClass* RC) const

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:76

Parameters

const llvm::TargetRegisterClass* RC

unsigned int computePSetLimit(
    unsigned int Idx) const

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:150

Parameters

unsigned int Idx

const llvm::RegisterClassInfo::RCInfo& get(
    const llvm::TargetRegisterClass* RC) const

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:79

Parameters

const llvm::TargetRegisterClass* RC

llvm::MCRegister getLastCalleeSavedAlias(
    llvm::MCRegister PhysReg) const

Description

getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or NoRegister if Reg doesn't overlap a CalleeSavedAliases.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:119

Parameters

llvm::MCRegister PhysReg

unsigned int getLastCostChange(
    const llvm::TargetRegisterClass* RC) const

Description

Get the position of the last cost change in getOrder(RC). All registers in getOrder(RC).slice(getLastCostChange(RC)) will have the same cost according to RegCosts[Reg].

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:136

Parameters

const llvm::TargetRegisterClass* RC

uint8_t getMinCost(
    const llvm::TargetRegisterClass* RC) const

Description

Get the minimum register cost in RC's allocation order. This is the smallest value in RegCosts[Reg] for all the registers in getOrder(RC).

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:128

Parameters

const llvm::TargetRegisterClass* RC

unsigned int getNumAllocatableRegs(
    const llvm::TargetRegisterClass* RC) const

Description

getNumAllocatableRegs - Returns the number of actually allocatable registers in RC in the current function.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:95

Parameters

const llvm::TargetRegisterClass* RC

ArrayRef<llvm::MCPhysReg> getOrder(
    const llvm::TargetRegisterClass* RC) const

Description

getOrder - Returns the preferred allocation order for RC. The order contains no reserved registers, and registers that alias callee saved registers come last.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:102

Parameters

const llvm::TargetRegisterClass* RC

unsigned int getRegPressureSetLimit(
    unsigned int Idx) const

Description

Get the register unit limit for the given pressure set index. RegisterClassInfo adjusts this limit for reserved registers.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:143

Parameters

unsigned int Idx

bool isProperSubClass(
    const llvm::TargetRegisterClass* RC) const

Description

isProperSubClass - Returns true if RC has a legal super-class with more allocatable registers. Register classes like GR32_NOSP are not proper sub-classes because %esp is not allocatable. Similarly, tGPR is not a proper sub-class in Thumb mode because the GPR super-class is not legal.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:112

Parameters

const llvm::TargetRegisterClass* RC

void runOnMachineFunction(
    const llvm::MachineFunction& MF)

Description

runOnFunction - Prepare to answer questions about MF. This must be called before any other methods are used.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:91

Parameters

const llvm::MachineFunction& MF