class CodeGenPassBuilder

Declaration

template <typename DerivedT>
class CodeGenPassBuilder { /* full declaration omitted */ };

Description

This class provides access to building LLVM's passes. Its members provide the baseline state available to passes during their construction. The \c MachinePassRegistry.def file specifies how to construct all of the built-in passes, and those may reference these members during construction.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:103

Templates

DerivedT

Member Variables

protected llvm::LLVMTargetMachine& TM
protected llvm::CGPassBuilderOption Opt
protected llvm::PassInstrumentationCallbacks* PIC

Method Overview

Methods

CodeGenPassBuilder<DerivedT>(
    llvm::LLVMTargetMachine& TM,
    llvm::CGPassBuilderOption Opts,
    llvm::PassInstrumentationCallbacks* PIC)

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:105

Parameters

llvm::LLVMTargetMachine& TM
llvm::CGPassBuilderOption Opts
llvm::PassInstrumentationCallbacks* PIC

void addAsmPrinter(
    llvm::CodeGenPassBuilder::AddMachinePass&,
    llvm::CodeGenPassBuilder::CreateMCStreamer)
    const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:435

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&
llvm::CodeGenPassBuilder::CreateMCStreamer

void addBlockPlacement(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Add standard basic block placement passes.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:431

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addCodeGenPrepare(
    llvm::CodeGenPassBuilder::AddIRPass&) const

Description

Add pass to prepare the LLVM IR for code generation. This should be done before exception handling preparation passes.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:397

Parameters

llvm::CodeGenPassBuilder::AddIRPass&

llvm::Error addCoreISelPasses(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Add the actual instruction selection passes. This does not include preparation passes on IR.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:382

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

llvm::Error addFastRegAlloc(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:416

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addGCPasses(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

addGCPasses - Add late codegen passes that analyze code for garbage collection. This should return true if GC info should be printed after these passes.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:428

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

llvm::Error addGlobalInstructionSelect(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, thereby constraining all generic virtual registers to register classes.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:367

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addILPOpts(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Add passes that optimize instruction level parallelism for out-of-order targets. These passes are run while the machine code is still in SSA form, so they can use MachineTraceMetrics to control their heuristics. All passes added here should preserve the MachineDominatorTree, MachineLoopInfo, and MachineTraceMetrics analyses.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:277

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addIRPasses(
    llvm::CodeGenPassBuilder::AddIRPass&) const

Description

Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:393

Parameters

llvm::CodeGenPassBuilder::AddIRPass&

llvm::Error addIRTranslator(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:331

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addISelPasses(
    llvm::CodeGenPassBuilder::AddIRPass&) const

Description

High level function that adds all passes necessary to go from llvm IR representation to the MI representation. Adds IR based lowering and target specific optimization passes and finally the core instruction selection passes.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:378

Parameters

llvm::CodeGenPassBuilder::AddIRPass&

void addISelPrepare(
    llvm::CodeGenPassBuilder::AddIRPass&) const

Description

Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:401

Parameters

llvm::CodeGenPassBuilder::AddIRPass&

llvm::Error addInstSelector(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:266

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

llvm::Error addLegalizeMachineIR(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:342

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addMachineLateOptimization(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Add passes that optimize machine instructions after register allocation.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:423

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

llvm::Error addMachinePasses(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Add the complete, standard set of LLVM CodeGen passes. Fully developed targets will not generally override this.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:386

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addMachineSSAOptimization(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:412

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addOptimizedRegAlloc(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

addOptimizedRegAlloc - Add passes related to register allocation. LLVMTargetMachine provides standard regalloc passes for most targets.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:420

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPassesToHandleExceptions(
    llvm::CodeGenPassBuilder::AddIRPass&) const

Description

Add passes to lower exception handling for the code generator.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:389

Parameters

llvm::CodeGenPassBuilder::AddIRPass&

void addPostRegAlloc(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:303

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPostRewrite(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Add passes to be run immediately after virtual registers are rewritten to physical registers.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:299

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreEmitPass(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This pass may be implemented by targets that want to run passes immediately before machine code is emitted.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:311

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreEmitPass2(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Targets may add passes immediately before machine code is emitted in this callback. This is called even later than `addPreEmitPass`.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:318

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreGlobalInstructionSelect(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:361

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreISel(
    llvm::CodeGenPassBuilder::AddIRPass&) const

Description

addPreISel - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:325

Parameters

llvm::CodeGenPassBuilder::AddIRPass&

void addPreLegalizeMachineIR(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method may be implemented by targets that want to run passes immediately before legalization.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:338

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreRegAlloc(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method may be implemented by targets that want to run passes immediately before register allocation.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:281

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreRegBankSelect(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method may be implemented by targets that want to run passes immediately before the register bank selection.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:349

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreRewrite(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers. These passes must preserve VirtRegMap and LiveIntervals, and when running after RABasic or RAGreedy, they should take advantage of LiveRegMatrix. When these passes run, VirtRegMap contains legal physreg assignments for all virtual registers. Note if the target overloads addRegAssignAndRewriteOptimized, this may not be honored. This is also not generally used for the the fast variant, where the allocation and rewriting are done in one pass.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:295

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addPreSched2(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:307

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addRegAllocPass(
    llvm::CodeGenPassBuilder::AddMachinePass&,
    bool Optimized) const

Description

addMachinePasses helper to create the target-selected or overriden regalloc pass.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:448

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&
bool Optimized

llvm::Error addRegAssignmentFast(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

Add core register alloator passes which do the actual register assignment and rewriting.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:452

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

Returns

true if any passes were added.

llvm::Error addRegAssignmentOptimized(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:453

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

llvm::Error addRegBankSelect(
    llvm::CodeGenPassBuilder::AddMachinePass&)
    const

Description

This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:354

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&

void addTargetRegisterAllocator(
    llvm::CodeGenPassBuilder::AddMachinePass&,
    bool Optimized) const

Description

createTargetRegisterAllocator - Create the register allocator pass for this target at the current optimization level.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:444

Parameters

llvm::CodeGenPassBuilder::AddMachinePass&
bool Optimized

llvm::Error buildPipeline(
    llvm::ModulePassManager& MPM,
    llvm::MachineFunctionPassManager& MFPM,
    llvm::raw_pwrite_stream& Out,
    llvm::raw_pwrite_stream* DwoOut,
    llvm::CodeGenFileType FileType) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:123

Parameters

llvm::ModulePassManager& MPM
llvm::MachineFunctionPassManager& MFPM
llvm::raw_pwrite_stream& Out
llvm::raw_pwrite_stream* DwoOut
llvm::CodeGenFileType FileType

DerivedT& derived()

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:456

const DerivedT& derived() const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:457

CodeGenOpt::Level getOptLevel() const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:248

llvm::PassInstrumentationCallbacks*
getPassInstrumentationCallbacks() const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:138

std::pair<StringRef, bool>
getPassNameFromLegacyName(llvm::StringRef) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:130

Parameters

llvm::StringRef

template <typename TMC>
TMC& getTM() const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:247

Templates

TMC

std::pair<StringRef, bool>
getTargetPassNameFromLegacyName(
    llvm::StringRef) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:243

Parameters

llvm::StringRef

bool isGlobalISelAbortEnabled() const

Description

Check whether or not GlobalISel should abort on error. When this is disabled, GlobalISel will fall back on SDISel instead of erroring out.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:253

void registerAnalyses(
    llvm::MachineFunctionAnalysisManager& MFAM)
    const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:132

Parameters

llvm::MachineFunctionAnalysisManager& MFAM

void registerFunctionAnalyses(
    llvm::FunctionAnalysisManager&) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:128

Parameters

llvm::FunctionAnalysisManager&

void registerMachineFunctionAnalyses(
    llvm::MachineFunctionAnalysisManager&) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:129

Parameters

llvm::MachineFunctionAnalysisManager&

void registerModuleAnalyses(
    llvm::ModuleAnalysisManager&) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:127

Parameters

llvm::ModuleAnalysisManager&

void registerTargetAnalysis(
    llvm::MachineFunctionAnalysisManager&) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:242

Parameters

llvm::MachineFunctionAnalysisManager&

void registerTargetAnalysis(
    llvm::FunctionAnalysisManager&) const

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:241

Parameters

llvm::FunctionAnalysisManager&

void registerTargetAnalysis(
    llvm::ModuleAnalysisManager&) const

Description

Target override these hooks to parse target-specific analyses.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:240

Parameters

llvm::ModuleAnalysisManager&

bool reportDiagnosticWhenGlobalISelFallback()
    const

Description

Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path. In other words, it will emit a diagnostic when GlobalISel failed and isGlobalISelAbortEnabled is false.

Declared at: llvm/include/llvm/CodeGen/CodeGenPassBuilder.h:260