struct DWARFDebugLine::Sequence

Declaration

struct DWARFDebugLine::Sequence { /* full declaration omitted */ };

Description

Represents a series of contiguous machine instructions. Line table for each compilation unit may consist of multiple sequences, which are not guaranteed to be in the order of ascending instruction address.

Declared at: llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h:194

Member Variables

public uint64_t LowPC

Sequence describes instructions at address range [LowPC, HighPC) and is described by line table rows [FirstRowIndex, LastRowIndex).

public uint64_t HighPC

public uint64_t SectionIndex

If relocation information is present then this is the index of the section which contains above addresses. Otherwise this is object::SectionedAddress::Undef value.

public unsigned int FirstRowIndex

public unsigned int LastRowIndex

public bool Empty

Method Overview

• public Sequence()
• public bool containsPC(object::SectionedAddress PC) const
• public bool isValid() const
• public static bool orderByHighPC(const llvm::DWARFDebugLine::Sequence & LHS, const llvm::DWARFDebugLine::Sequence & RHS)
• public void reset()

Methods

¶Sequence()

Declared at: llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h:195

¶bool containsPC(object::SectionedAddress PC) const

Declared at: llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h:220

Parameters

object::SectionedAddress PC

¶bool isValid() const

Declared at: llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h:216

¶static bool orderByHighPC(
    const llvm::DWARFDebugLine::Sequence& LHS,
    const llvm::DWARFDebugLine::Sequence& RHS)

Declared at: llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h:211

Parameters

const llvm::DWARFDebugLine::Sequence& LHS

const llvm::DWARFDebugLine::Sequence& RHS

¶void reset()

Declared at: llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h:209