class InterferenceCache::Entry

Declaration

class InterferenceCache::Entry { /* full declaration omitted */ };

Description

Entry - A cache entry containing interference information for all aliases of PhysReg in all basic blocks.

Declared at: llvm/lib/CodeGen/InterferenceCache.h:45

Member Variables

private llvm::MCRegister PhysReg = 0
PhysReg - The register currently represented.
private unsigned int Tag = 0
Tag - Cache tag is changed when any of the underlying LiveIntervalUnions change.
private unsigned int RefCount = 0
RefCount - The total number of Cursor instances referring to this Entry.
private llvm::MachineFunction* MF
MF - The current function.
private llvm::SlotIndexes* Indexes = nullptr
Indexes - Mapping block numbers to SlotIndex ranges.
private llvm::LiveIntervals* LIS = nullptr
LIS - Used for accessing register mask interference maps.
private llvm::SlotIndex PrevPos
PrevPos - The previous position the iterators were moved to.
private SmallVector< llvm::InterferenceCache::Entry::RegUnitInfo, 4> RegUnits
Info for each RegUnit in PhysReg. It is very rare ofr a PHysReg to have more than 4 RegUnits.
private SmallVector< llvm::InterferenceCache::BlockInterference, 8> Blocks
Blocks - Interference for each block in the function.

Method Overview

  • public Entry()
  • public void addRef(int Delta)
  • public void clear(llvm::MachineFunction * mf, llvm::SlotIndexes * indexes, llvm::LiveIntervals * lis)
  • public llvm::InterferenceCache::BlockInterference * get(unsigned int MBBNum)
  • public llvm::MCRegister getPhysReg() const
  • public bool hasRefs() const
  • public void reset(llvm::MCRegister physReg, llvm::LiveIntervalUnion * LIUArray, const llvm::TargetRegisterInfo * TRI, const llvm::MachineFunction * MF)
  • public void revalidate(llvm::LiveIntervalUnion * LIUArray, const llvm::TargetRegisterInfo * TRI)
  • private void update(unsigned int MBBNum)
  • public bool valid(llvm::LiveIntervalUnion * LIUArray, const llvm::TargetRegisterInfo * TRI)

Methods

Entry()

Declared at: llvm/lib/CodeGen/InterferenceCache.h:101

void addRef(int Delta)

Declared at: llvm/lib/CodeGen/InterferenceCache.h:113

Parameters

int Delta

void clear(llvm::MachineFunction* mf,
           llvm::SlotIndexes* indexes,
           llvm::LiveIntervals* lis)

Declared at: llvm/lib/CodeGen/InterferenceCache.h:103

Parameters

llvm::MachineFunction* mf
llvm::SlotIndexes* indexes
llvm::LiveIntervals* lis

llvm::InterferenceCache::BlockInterference* get(
    unsigned int MBBNum)

Description

get - Return an up to date BlockInterference.

Declared at: llvm/lib/CodeGen/InterferenceCache.h:127

Parameters

unsigned int MBBNum

llvm::MCRegister getPhysReg() const

Declared at: llvm/lib/CodeGen/InterferenceCache.h:111

bool hasRefs() const

Declared at: llvm/lib/CodeGen/InterferenceCache.h:115

void reset(llvm::MCRegister physReg,
           llvm::LiveIntervalUnion* LIUArray,
           const llvm::TargetRegisterInfo* TRI,
           const llvm::MachineFunction* MF)

Description

reset - Initialize entry to represent physReg's aliases.

Declared at: llvm/lib/CodeGen/InterferenceCache.h:123

Parameters

llvm::MCRegister physReg
llvm::LiveIntervalUnion* LIUArray
const llvm::TargetRegisterInfo* TRI
const llvm::MachineFunction* MF

void revalidate(
    llvm::LiveIntervalUnion* LIUArray,
    const llvm::TargetRegisterInfo* TRI)

Declared at: llvm/lib/CodeGen/InterferenceCache.h:117

Parameters

llvm::LiveIntervalUnion* LIUArray
const llvm::TargetRegisterInfo* TRI

void update(unsigned int MBBNum)

Description

update - Recompute Blocks[MBBNum]

Declared at: llvm/lib/CodeGen/InterferenceCache.h:98

Parameters

unsigned int MBBNum

bool valid(llvm::LiveIntervalUnion* LIUArray,
           const llvm::TargetRegisterInfo* TRI)

Description

valid - Return true if this is a valid entry for physReg.

Declared at: llvm/lib/CodeGen/InterferenceCache.h:120

Parameters

llvm::LiveIntervalUnion* LIUArray
const llvm::TargetRegisterInfo* TRI