struct X86GenRegisterInfo

Declaration

struct X86GenRegisterInfo : public TargetRegisterInfo { /* full declaration omitted */ };

Description

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDesc objects that represent all of the machine registers that the target has. As such, we simply have to track a pointer to this array so that we can turn register number into a register descriptor.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4458

Inherits from: TargetRegisterInfo

Member Variables

Method Overview

Inherited from TargetRegisterInfo:

Inherited from MCRegisterInfo:

Methods

X86GenRegisterInfo(unsigned int RA,
                   unsigned int D = 0,
                   unsigned int E = 0,
                   unsigned int PC = 0,
                   unsigned int HwMode = 0)

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4459

Parameters

unsigned int RA
unsigned int D = 0
unsigned int E = 0
unsigned int PC = 0
unsigned int HwMode = 0

llvm::LaneBitmask composeSubRegIndexLaneMaskImpl(
    unsigned int,
    llvm::LaneBitmask) const

Description

Overridden by TableGen in targets that have sub-registers.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4462

Parameters

unsigned int
llvm::LaneBitmask

unsigned int composeSubRegIndicesImpl(
    unsigned int,
    unsigned int) const

Description

Overridden by TableGen in targets that have sub-registers.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4461

Parameters

unsigned int
unsigned int

static const llvm::X86FrameLowering*
getFrameLowering(const llvm::MachineFunction& MF)

Description

Devirtualized TargetFrameLowering.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4478

Parameters

const llvm::MachineFunction& MF

unsigned int getNumRegPressureSets() const

Description

Get the number of dimensions of register pressure.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4467

const int* getRegClassPressureSets(
    const llvm::TargetRegisterClass* RC) const

Description

Get the dimensions of register pressure impacted by this register class. Returns a -1 terminated array of pressure set IDs.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4470

Parameters

const llvm::TargetRegisterClass* RC

const llvm::RegClassWeight& getRegClassWeight(
    const llvm::TargetRegisterClass* RC) const

Description

Get the weight in units of pressure for this register class.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4465

Parameters

const llvm::TargetRegisterClass* RC

ArrayRef<const char*> getRegMaskNames() const

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4472

ArrayRef<const uint32_t*> getRegMasks() const

Description

Return all the call-preserved register masks defined for this target.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4473

unsigned int getRegPressureSetLimit(
    const llvm::MachineFunction& MF,
    unsigned int Idx) const

Description

Get the register unit pressure limit for this dimension. This limit must be adjusted dynamically for reserved registers.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4469

Parameters

const llvm::MachineFunction& MF
unsigned int Idx

const char* getRegPressureSetName(
    unsigned int Idx) const

Description

Get the name of this register unit pressure set.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4468

Parameters

unsigned int Idx

const int* getRegUnitPressureSets(
    unsigned int RegUnit) const

Description

Get the dimensions of register pressure impacted by this register unit. Returns a -1 terminated array of pressure set IDs.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4471

Parameters

unsigned int RegUnit

unsigned int getRegUnitWeight(
    unsigned int RegUnit) const

Description

Get the weight in units of pressure for this register unit.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4466

Parameters

unsigned int RegUnit

const llvm::TargetRegisterClass*
getSubClassWithSubReg(
    const llvm::TargetRegisterClass*,
    unsigned int) const

Description

Returns the largest legal sub-class of RC that supports the sub-register index Idx. If no such sub-class exists, return NULL. If all registers in RC already have an Idx sub-register, return RC. TableGen generates a version of this function that is good enough in most cases. Targets can override if they have constraints that TableGen doesn't understand. For example, the x86 sub_8bit sub-register index is supported by the full GR32 register class in 64-bit mode, but only by the GR32_ABCD regiister class in 32-bit mode. TableGen will synthesize missing RC sub-classes.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4464

Parameters

const llvm::TargetRegisterClass*
unsigned int

bool isArgumentRegister(
    const llvm::MachineFunction&,
    llvm::MCRegister) const

Description

Returns true if PhysReg can be used as an argument to a function.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4476

Parameters

const llvm::MachineFunction&
llvm::MCRegister

bool isFixedRegister(const llvm::MachineFunction&,
                     llvm::MCRegister) const

Description

Returns true if PhysReg is a fixed register.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4475

Parameters

const llvm::MachineFunction&
llvm::MCRegister

bool isGeneralPurposeRegister(
    const llvm::MachineFunction&,
    llvm::MCRegister) const

Description

Returns true if PhysReg is a general purpose register.

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4474

Parameters

const llvm::MachineFunction&
llvm::MCRegister

llvm::LaneBitmask
reverseComposeSubRegIndexLaneMaskImpl(
    unsigned int,
    llvm::LaneBitmask) const

Declared at: build/lib/Target/X86/X86GenRegisterInfo.inc:4463

Parameters

unsigned int
llvm::LaneBitmask