class AllocationOrder

Declaration

class AllocationOrder { /* full declaration omitted */ };

Declared at: llvm/lib/CodeGen/AllocationOrder.h:30

Member Variables

private const SmallVector<llvm::MCPhysReg, 16> Hints

private ArrayRef<llvm::MCPhysReg> Order

private const int IterationLimit

Method Overview

• public AllocationOrder(SmallVector<llvm::MCPhysReg, 16> && Hints, ArrayRef<llvm::MCPhysReg> Order, bool HardHints)
• public llvm::AllocationOrder::Iterator begin() const
• public static llvm::AllocationOrder create(unsigned int VirtReg, const llvm::VirtRegMap & VRM, const llvm::RegisterClassInfo & RegClassInfo, const llvm::LiveRegMatrix * Matrix)
• public llvm::AllocationOrder::Iterator end() const
• public ArrayRef<llvm::MCPhysReg> getOrder() const
• public llvm::AllocationOrder::Iterator getOrderLimitEnd(unsigned int OrderLimit) const
• public bool isHint(llvm::Register Reg) const

Methods

¶AllocationOrder(
    SmallVector<llvm::MCPhysReg, 16>&& Hints,
    ArrayRef<llvm::MCPhysReg> Order,
    bool HardHints)

Description

Create an AllocationOrder given the Hits, Order, and HardHits values. Use the create method above - the ctor is for unittests.

Declared at: llvm/lib/CodeGen/AllocationOrder.h:90

Parameters

SmallVector<llvm::MCPhysReg, 16>&& Hints

ArrayRef<llvm::MCPhysReg> Order

bool HardHints

¶llvm::AllocationOrder::Iterator begin() const

Declared at: llvm/lib/CodeGen/AllocationOrder.h:95

¶static llvm::AllocationOrder create(
    unsigned int VirtReg,
    const llvm::VirtRegMap& VRM,
    const llvm::RegisterClassInfo& RegClassInfo,
    const llvm::LiveRegMatrix* Matrix)

Description

Create a new AllocationOrder for VirtReg.

Declared at: llvm/lib/CodeGen/AllocationOrder.h:84

Parameters

unsigned int VirtReg

Virtual register to allocate for.

const llvm::VirtRegMap& VRM

Virtual register map for function.

const llvm::RegisterClassInfo& RegClassInfo

Information about reserved and allocatable registers.

const llvm::LiveRegMatrix* Matrix

¶llvm::AllocationOrder::Iterator end() const

Declared at: llvm/lib/CodeGen/AllocationOrder.h:99

¶ArrayRef<llvm::MCPhysReg> getOrder() const

Description

Get the allocation order without reordered hints.

Declared at: llvm/lib/CodeGen/AllocationOrder.h:111

¶llvm::AllocationOrder::Iterator getOrderLimitEnd(
    unsigned int OrderLimit) const

Declared at: llvm/lib/CodeGen/AllocationOrder.h:101

Parameters

unsigned int OrderLimit

¶bool isHint(llvm::Register Reg) const

Description

Return true if Reg is a preferred physical register.

Declared at: llvm/lib/CodeGen/AllocationOrder.h:114

Parameters

llvm::Register Reg