class InOrderIssueStage

Declaration

class InOrderIssueStage : public Stage { /* full declaration omitted */ };

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:54

Inherits from: Stage

Member Variables

private const llvm::MCSubtargetInfo& STI

private llvm::mca::RegisterFile& PRF

private llvm::mca::ResourceManager RM

private llvm::mca::CustomBehaviour& CB

private llvm::mca::LSUnit& LSU

private SmallVector<llvm::mca::InstRef, 4> IssuedInst

Instructions that were issued, but not executed yet.

private unsigned int NumIssued

Number of instructions issued in the current cycle.

private llvm::mca::StallInfo SI

private llvm::mca::InstRef CarriedOver

Instruction that is issued in more than 1 cycle.

private unsigned int CarryOver

Number of CarriedOver uops left to issue.

private unsigned int Bandwidth

Number of instructions that can be issued in the current cycle.

private unsigned int LastWriteBackCycle

Number of cycles (counted from the current cycle) until the last write is committed. This is taken into account to ensure that writes commit in the program order.

Method Overview

• private InOrderIssueStage(const llvm::mca::InOrderIssueStage & Other)
• public InOrderIssueStage(const llvm::MCSubtargetInfo & STI, llvm::mca::RegisterFile & PRF, llvm::mca::CustomBehaviour & CB, llvm::mca::LSUnit & LSU)
• private bool canExecute(const llvm::mca::InstRef & IR)
• public llvm::Error cycleEnd()
• public llvm::Error cycleStart()
• public llvm::Error execute(llvm::mca::InstRef & IR)
• public unsigned int getIssueWidth() const
• public bool hasWorkToComplete() const
• public bool isAvailable(const llvm::mca::InstRef &) const
• private void notifyInstructionDispatched(const llvm::mca::InstRef & IR, unsigned int Ops, ArrayRef<unsigned int> UsedRegs)
• private void notifyInstructionExecuted(const llvm::mca::InstRef & IR)
• private void notifyInstructionIssued(const llvm::mca::InstRef & IR, ArrayRef<llvm::mca::ResourceUse> UsedRes)
• private void notifyInstructionRetired(const llvm::mca::InstRef & IR, ArrayRef<unsigned int> FreedRegs)
• private void notifyStallEvent()
• private void retireInstruction(llvm::mca::InstRef & IR)
• private llvm::Error tryIssue(llvm::mca::InstRef & IR)
• private void updateCarriedOver()
• private void updateIssuedInst()

Inherited from Stage:

• public addListener
• public checkNextStage
• public cycleEnd
• public cycleResume
• public cycleStart
• public execute
• protected getListeners
• public hasWorkToComplete
• public isAvailable
• public moveToTheNextStage
• public notifyEvent
• public setNextInSequence

Methods

¶InOrderIssueStage(
    const llvm::mca::InOrderIssueStage& Other)

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:82

Parameters

const llvm::mca::InOrderIssueStage& Other

¶InOrderIssueStage(
    const llvm::MCSubtargetInfo& STI,
    llvm::mca::RegisterFile& PRF,
    llvm::mca::CustomBehaviour& CB,
    llvm::mca::LSUnit& LSU)

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:115

Parameters

const llvm::MCSubtargetInfo& STI

llvm::mca::RegisterFile& PRF

llvm::mca::CustomBehaviour& CB

llvm::mca::LSUnit& LSU

¶bool canExecute(const llvm::mca::InstRef& IR)

Description

Returns true if IR can execute during this cycle. In case of stall, it updates SI with information about the stalled instruction and the stall reason.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:88

Parameters

const llvm::mca::InstRef& IR

¶llvm::Error cycleEnd()

Description

Called once at the end of each cycle.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:123

¶llvm::Error cycleStart()

Description

Called once at the start of each cycle. This can be used as a setup phase to prepare for the executions during the cycle.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:122

¶llvm::Error execute(llvm::mca::InstRef& IR)

Description

The primary action that this stage performs on instruction IR.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:121

Parameters

llvm::mca::InstRef& IR

¶unsigned int getIssueWidth() const

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:118

¶bool hasWorkToComplete() const

Description

Returns true if some instructions are still executing this stage.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:120

¶bool isAvailable(const llvm::mca::InstRef&) const

Description

Returns true if it can execute IR during this cycle.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:119

Parameters

const llvm::mca::InstRef&

¶void notifyInstructionDispatched(
    const llvm::mca::InstRef& IR,
    unsigned int Ops,
    ArrayRef<unsigned int> UsedRegs)

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:105

Parameters

const llvm::mca::InstRef& IR

unsigned int Ops

ArrayRef<unsigned int> UsedRegs

¶void notifyInstructionExecuted(
    const llvm::mca::InstRef& IR)

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:107

Parameters

const llvm::mca::InstRef& IR

¶void notifyInstructionIssued(
    const llvm::mca::InstRef& IR,
    ArrayRef<llvm::mca::ResourceUse> UsedRes)

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:103

Parameters

const llvm::mca::InstRef& IR

ArrayRef<llvm::mca::ResourceUse> UsedRes

¶void notifyInstructionRetired(
    const llvm::mca::InstRef& IR,
    ArrayRef<unsigned int> FreedRegs)

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:108

Parameters

const llvm::mca::InstRef& IR

ArrayRef<unsigned int> FreedRegs

¶void notifyStallEvent()

Description

Notifies a stall event to the Stage listener. Stall information is obtained from the internal StallInfo field.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:101

¶void retireInstruction(llvm::mca::InstRef& IR)

Description

Retire instruction once it is executed.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:112

Parameters

llvm::mca::InstRef& IR

¶llvm::Error tryIssue(llvm::mca::InstRef& IR)

Description

Issue the instruction, or update the StallInfo.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:91

Parameters

llvm::mca::InstRef& IR

¶void updateCarriedOver()

Description

Continue to issue the CarriedOver instruction.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:97

¶void updateIssuedInst()

Description

Update status of instructions from IssuedInst.

Declared at: llvm/include/llvm/MCA/Stages/InOrderIssueStage.h:94