class IRTranslator

Declaration

class IRTranslator : public MachineFunctionPass { /* full declaration omitted */ };

Description

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of passes that operate on the MachineFunction representation. Instead of overriding runOnFunction, subclasses override runOnMachineFunction.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:62

Inherits from: MachineFunctionPass

Member Variables

private const llvm::CallLowering* CLI
Interface used to lower the everything related to calls.
private llvm::IRTranslator::ValueToVRegInfo VMap
Mapping of the values of the current LLVM IR function to the related virtual registers and offsets.
private DenseMap<const llvm::BasicBlock*, llvm::MachineBasicBlock*> BBToMBB
private DenseMap<llvm::IRTranslator::CFGEdge, SmallVector<llvm::MachineBasicBlock*, 1>> MachinePreds
private SmallVector< std::pair<const PHINode*, SmallVector<MachineInstr*, 1>>, 4> PendingPHIs
private DenseMap<const llvm::AllocaInst*, int> FrameIndices
Record of what frame index has been allocated to specified allocas for this function.
private llvm::SwiftErrorValueTracking SwiftError
private std::unique_ptr<MachineIRBuilder> CurBuilder
private std::unique_ptr<MachineIRBuilder> EntryBuilder
private llvm::MachineFunction* MF
private llvm::MachineRegisterInfo* MRI = nullptr
MachineRegisterInfo used to create virtual registers.
private const llvm::DataLayout* DL
private const llvm::TargetPassConfig* TPC
Current target configuration. Controls how the pass handles errors.
private CodeGenOpt::Level OptLevel
private std::unique_ptr<OptimizationRemarkEmitter> ORE
Current optimization remark emitter. Used to report failures.
private llvm::AAResults* AA
private llvm::FunctionLoweringInfo FuncInfo
private bool EnableOpts = false
private bool HasTailCall = false
True when the block contains a tail call. This allows the IRTranslator to stop translating such blocks early.
private llvm::StackProtectorDescriptor SPDescriptor
private std::unique_ptr<GISelSwitchLowering> SL
public static char ID

Method Overview

  • public IRTranslator(CodeGenOpt::Level OptLevel = CodeGenOpt::None)
  • private void addMachineCFGPred(llvm::IRTranslator::CFGEdge Edge, llvm::MachineBasicBlock * NewPred)
  • private void addSuccessorWithProb(llvm::MachineBasicBlock * Src, llvm::MachineBasicBlock * Dst, llvm::BranchProbability Prob = BranchProbability::getUnknown())
  • private ValueToVRegInfo::VRegListT & allocateVRegs(const llvm::Value & Val)
  • private void emitBitTestCase(SwitchCG::BitTestBlock & BB, llvm::MachineBasicBlock * NextMBB, llvm::BranchProbability BranchProbToNext, llvm::Register Reg, SwitchCG::BitTestCase & B, llvm::MachineBasicBlock * SwitchBB)
  • private void emitBitTestHeader(SwitchCG::BitTestBlock & BTB, llvm::MachineBasicBlock * SwitchMBB)
  • private void emitBranchForMergedCondition(const llvm::Value * Cond, llvm::MachineBasicBlock * TBB, llvm::MachineBasicBlock * FBB, llvm::MachineBasicBlock * CurBB, llvm::MachineBasicBlock * SwitchBB, llvm::BranchProbability TProb, llvm::BranchProbability FProb, bool InvertCond)
  • private void emitJumpTable(SwitchCG::JumpTable & JT, llvm::MachineBasicBlock * MBB)
  • private bool emitJumpTableHeader(SwitchCG::JumpTable & JT, SwitchCG::JumpTableHeader & JTH, llvm::MachineBasicBlock * HeaderBB)
  • private bool emitSPDescriptorFailure(llvm::StackProtectorDescriptor & SPD, llvm::MachineBasicBlock * FailureBB)
  • private bool emitSPDescriptorParent(llvm::StackProtectorDescriptor & SPD, llvm::MachineBasicBlock * ParentBB)
  • private void emitSwitchCase(SwitchCG::CaseBlock & CB, llvm::MachineBasicBlock * SwitchBB, llvm::MachineIRBuilder & MIB)
  • private bool finalizeBasicBlock(const llvm::BasicBlock & BB, llvm::MachineBasicBlock & MBB)
  • private void finalizeFunction()
  • private void findMergedConditions(const llvm::Value * Cond, llvm::MachineBasicBlock * TBB, llvm::MachineBasicBlock * FBB, llvm::MachineBasicBlock * CurBB, llvm::MachineBasicBlock * SwitchBB, Instruction::BinaryOps Opc, llvm::BranchProbability TProb, llvm::BranchProbability FProb, bool InvertCond)
  • private bool findUnwindDestinations(const llvm::BasicBlock * EHPadBB, llvm::BranchProbability Prob, SmallVectorImpl<std::pair<MachineBasicBlock *, BranchProbability>> & UnwindDests)
  • private void finishPendingPhis()
  • public void getAnalysisUsage(llvm::AnalysisUsage & AU) const
  • private llvm::BranchProbability getEdgeProbability(const llvm::MachineBasicBlock * Src, const llvm::MachineBasicBlock * Dst) const
  • private llvm::MachineBasicBlock & getMBB(const llvm::BasicBlock & BB)
  • private SmallVector<llvm::MachineBasicBlock *, 1> getMachinePredBBs(llvm::IRTranslator::CFGEdge Edge)
  • private llvm::Align getMemOpAlign(const llvm::Instruction & I)
  • private int getOrCreateFrameIndex(const llvm::AllocaInst & AI)
  • private llvm::Register getOrCreateVReg(const llvm::Value & Val)
  • private ArrayRef<llvm::Register> getOrCreateVRegs(const llvm::Value & Val)
  • public llvm::StringRef getPassName() const
  • private unsigned int getSimpleIntrinsicOpcode(Intrinsic::ID ID)
  • private void getStackGuard(llvm::Register DstReg, llvm::MachineIRBuilder & MIRBuilder)
  • private bool lowerBitTestWorkItem(SwitchCG::SwitchWorkListItem W, llvm::MachineBasicBlock * SwitchMBB, llvm::MachineBasicBlock * CurMBB, llvm::MachineBasicBlock * DefaultMBB, llvm::MachineIRBuilder & MIB, MachineFunction::iterator BBI, llvm::BranchProbability DefaultProb, llvm::BranchProbability UnhandledProbs, SwitchCG::CaseClusterIt I, llvm::MachineBasicBlock * Fallthrough, bool FallthroughUnreachable)
  • private bool lowerJumpTableWorkItem(SwitchCG::SwitchWorkListItem W, llvm::MachineBasicBlock * SwitchMBB, llvm::MachineBasicBlock * CurMBB, llvm::MachineBasicBlock * DefaultMBB, llvm::MachineIRBuilder & MIB, MachineFunction::iterator BBI, llvm::BranchProbability UnhandledProbs, SwitchCG::CaseClusterIt I, llvm::MachineBasicBlock * Fallthrough, bool FallthroughUnreachable)
  • private bool lowerSwitchRangeWorkItem(SwitchCG::CaseClusterIt I, llvm::Value * Cond, llvm::MachineBasicBlock * Fallthrough, bool FallthroughUnreachable, llvm::BranchProbability UnhandledProbs, llvm::MachineBasicBlock * CurMBB, llvm::MachineIRBuilder & MIB, llvm::MachineBasicBlock * SwitchMBB)
  • private bool lowerSwitchWorkItem(SwitchCG::SwitchWorkListItem W, llvm::Value * Cond, llvm::MachineBasicBlock * SwitchMBB, llvm::MachineBasicBlock * DefaultMBB, llvm::MachineIRBuilder & MIB)
  • public bool runOnMachineFunction(llvm::MachineFunction & MF)
  • private bool shouldEmitAsBranches(const std::vector<SwitchCG::CaseBlock> & Cases)
  • private bool translate(const llvm::Constant & C, llvm::Register Reg)
  • private bool translate(const llvm::Instruction & Inst)
  • private bool translateAShr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateAdd(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateAddrSpaceCast(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateAlloca(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateAnd(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateAtomicCmpXchg(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateAtomicRMW(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateBinaryOp(unsigned int Opcode, const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateBitCast(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateBr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCall(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCallBase(const llvm::CallBase & CB, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCallBr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCast(unsigned int Opcode, const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCatchPad(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCatchRet(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCatchSwitch(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCleanupPad(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCleanupRet(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCompare(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateConstrainedFPIntrinsic(const llvm::ConstrainedFPIntrinsic & FPI, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateCopy(const llvm::User & U, const llvm::Value & V, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateExtractElement(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateExtractValue(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFAdd(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFCmp(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFDiv(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFMul(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFNeg(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFPExt(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFPToSI(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFPToUI(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFPTrunc(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFRem(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFSub(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFence(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFixedPointIntrinsic(unsigned int Op, const llvm::CallInst & CI, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateFreeze(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateGetElementPtr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateICmp(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateIndirectBr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateInlineAsm(const llvm::CallBase & CB, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateInsertElement(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateInsertValue(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateIntToPtr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateInvoke(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateKnownIntrinsic(const llvm::CallInst & CI, Intrinsic::ID ID, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateLShr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateLandingPad(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateLoad(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateMemFunc(const llvm::CallInst & CI, llvm::MachineIRBuilder & MIRBuilder, unsigned int Opcode)
  • private bool translateMul(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateOr(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateOverflowIntrinsic(const llvm::CallInst & CI, unsigned int Op, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translatePHI(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translatePtrToInt(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateResume(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateRet(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSDiv(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSExt(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSIToFP(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSRem(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSelect(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateShl(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateShuffleVector(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSimpleIntrinsic(const llvm::CallInst & CI, Intrinsic::ID ID, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateStore(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSub(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateSwitch(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateTrunc(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateUDiv(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateUIToFP(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateURem(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateUnaryOp(unsigned int Opcode, const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateUnreachable(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateUserOp1(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateUserOp2(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateVAArg(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateXor(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)
  • private bool translateZExt(const llvm::User & U, llvm::MachineIRBuilder & MIRBuilder)

Inherited from MachineFunctionPass:

Inherited from FunctionPass:

Inherited from Pass:

Methods

IRTranslator(
    CodeGenOpt::Level OptLevel = CodeGenOpt::None)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:702

Parameters

CodeGenOpt::Level OptLevel = CodeGenOpt::None

void addMachineCFGPred(
    llvm::IRTranslator::CFGEdge Edge,
    llvm::MachineBasicBlock* NewPred)

Description

Record \p NewPred as a Machine predecessor to `Edge.second`, corresponding to `Edge.first` at the IR level. This is used when IRTranslation creates multiple MachineBasicBlocks for a given IR block and the CFG is no longer represented simply by the IR-level CFG.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:679

Parameters

llvm::IRTranslator::CFGEdge Edge
llvm::MachineBasicBlock* NewPred

void addSuccessorWithProb(
    llvm::MachineBasicBlock* Src,
    llvm::MachineBasicBlock* Dst,
    llvm::BranchProbability Prob =
        BranchProbability::getUnknown())

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:697

Parameters

llvm::MachineBasicBlock* Src
llvm::MachineBasicBlock* Dst
llvm::BranchProbability Prob = BranchProbability::getUnknown()

ValueToVRegInfo::VRegListT& allocateVRegs(
    const llvm::Value& Val)

Description

Allocate some vregs and offsets in the VMap. Then populate just the offsets while leaving the vregs empty.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:659

Parameters

const llvm::Value& Val

void emitBitTestCase(
    SwitchCG::BitTestBlock& BB,
    llvm::MachineBasicBlock* NextMBB,
    llvm::BranchProbability BranchProbToNext,
    llvm::Register Reg,
    SwitchCG::BitTestCase& B,
    llvm::MachineBasicBlock* SwitchBB)

Description

Generate code to produces one "bit test" for a given BitTestCase \p B.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:350

Parameters

SwitchCG::BitTestBlock& BB
llvm::MachineBasicBlock* NextMBB
llvm::BranchProbability BranchProbToNext
llvm::Register Reg
SwitchCG::BitTestCase& B
llvm::MachineBasicBlock* SwitchBB

void emitBitTestHeader(
    SwitchCG::BitTestBlock& BTB,
    llvm::MachineBasicBlock* SwitchMBB)

Description

Generate for for the BitTest header block, which precedes each sequence of BitTestCases.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:347

Parameters

SwitchCG::BitTestBlock& BTB
llvm::MachineBasicBlock* SwitchMBB

void emitBranchForMergedCondition(
    const llvm::Value* Cond,
    llvm::MachineBasicBlock* TBB,
    llvm::MachineBasicBlock* FBB,
    llvm::MachineBasicBlock* CurBB,
    llvm::MachineBasicBlock* SwitchBB,
    llvm::BranchProbability TProb,
    llvm::BranchProbability FProb,
    bool InvertCond)

Description

Helper method for findMergedConditions. This function emits a branch and is used at the leaves of an OR or an AND operator tree.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:318

Parameters

const llvm::Value* Cond
llvm::MachineBasicBlock* TBB
llvm::MachineBasicBlock* FBB
llvm::MachineBasicBlock* CurBB
llvm::MachineBasicBlock* SwitchBB
llvm::BranchProbability TProb
llvm::BranchProbability FProb
bool InvertCond

void emitJumpTable(SwitchCG::JumpTable& JT,
                   llvm::MachineBasicBlock* MBB)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:340

Parameters

SwitchCG::JumpTable& JT
llvm::MachineBasicBlock* MBB

bool emitJumpTableHeader(
    SwitchCG::JumpTable& JT,
    SwitchCG::JumpTableHeader& JTH,
    llvm::MachineBasicBlock* HeaderBB)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:337

Parameters

SwitchCG::JumpTable& JT
SwitchCG::JumpTableHeader& JTH
llvm::MachineBasicBlock* HeaderBB

bool emitSPDescriptorFailure(
    llvm::StackProtectorDescriptor& SPD,
    llvm::MachineBasicBlock* FailureBB)

Description

Codegen the failure basic block for a stack protector check. A failure stack protector machine basic block consists simply of a call to __stack_chk_fail(). For a high level explanation of how this fits into the stack protector generation see the comment on the declaration of class StackProtectorDescriptor.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:639

Parameters

llvm::StackProtectorDescriptor& SPD
llvm::MachineBasicBlock* FailureBB

Returns

true if there were no problems.

bool emitSPDescriptorParent(
    llvm::StackProtectorDescriptor& SPD,
    llvm::MachineBasicBlock* ParentBB)

Description

Codegen a new tail for a stack protector check ParentMBB which has had its tail spliced into a stack protector check success bb. For a high level explanation of how this fits into the stack protector generation see the comment on the declaration of class StackProtectorDescriptor.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:626

Parameters

llvm::StackProtectorDescriptor& SPD
llvm::MachineBasicBlock* ParentBB

Returns

true if there were no problems.

void emitSwitchCase(
    SwitchCG::CaseBlock& CB,
    llvm::MachineBasicBlock* SwitchBB,
    llvm::MachineIRBuilder& MIB)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:342

Parameters

SwitchCG::CaseBlock& CB
llvm::MachineBasicBlock* SwitchBB
llvm::MachineIRBuilder& MIB

bool finalizeBasicBlock(
    const llvm::BasicBlock& BB,
    llvm::MachineBasicBlock& MBB)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:616

Parameters

const llvm::BasicBlock& BB
llvm::MachineBasicBlock& MBB

void finalizeFunction()

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:611

void findMergedConditions(
    const llvm::Value* Cond,
    llvm::MachineBasicBlock* TBB,
    llvm::MachineBasicBlock* FBB,
    llvm::MachineBasicBlock* CurBB,
    llvm::MachineBasicBlock* SwitchBB,
    Instruction::BinaryOps Opc,
    llvm::BranchProbability TProb,
    llvm::BranchProbability FProb,
    bool InvertCond)

Description

Used during condbr translation to find trees of conditions that can be optimized.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:326

Parameters

const llvm::Value* Cond
llvm::MachineBasicBlock* TBB
llvm::MachineBasicBlock* FBB
llvm::MachineBasicBlock* CurBB
llvm::MachineBasicBlock* SwitchBB
Instruction::BinaryOps Opc
llvm::BranchProbability TProb
llvm::BranchProbability FProb
bool InvertCond

bool findUnwindDestinations(
    const llvm::BasicBlock* EHPadBB,
    llvm::BranchProbability Prob,
    SmallVectorImpl<std::pair<MachineBasicBlock*,
                              BranchProbability>>&
        UnwindDests)

Description

When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately go. In the IR, we have a single unwind destination, but in the machine CFG, we enumerate all the possible blocks. This function skips over imaginary basic blocks that hold catchswitch instructions, and finds all the "real" machine basic block destinations. As those destinations may not be successors of EHPadBB, here we also calculate the edge probability to those destinations. The passed-in Prob is the edge probability to EHPadBB.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:265

Parameters

const llvm::BasicBlock* EHPadBB
llvm::BranchProbability Prob
SmallVectorImpl<std::pair<MachineBasicBlock*, BranchProbability>>& UnwindDests

void finishPendingPhis()

Description

Add remaining operands onto phis we've translated. Executed after all MachineBasicBlocks for the function have been created.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:299

void getAnalysisUsage(
    llvm::AnalysisUsage& AU) const

Description

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this. For MachineFunctionPasses, calling AU.preservesCFG() indicates that the pass does not modify the MachineBasicBlock CFG.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:706

Parameters

llvm::AnalysisUsage& AU

llvm::BranchProbability getEdgeProbability(
    const llvm::MachineBasicBlock* Src,
    const llvm::MachineBasicBlock* Dst) const

Description

Return branch probability calculated by BranchProbabilityInfo for IR blocks.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:694

Parameters

const llvm::MachineBasicBlock* Src
const llvm::MachineBasicBlock* Dst

llvm::MachineBasicBlock& getMBB(
    const llvm::BasicBlock& BB)

Description

Get the MachineBasicBlock that represents \p BB. Specifically, the block returned will be the head of the translated block (suitable for branch destinations).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:673

Parameters

const llvm::BasicBlock& BB

SmallVector<llvm::MachineBasicBlock*, 1>
getMachinePredBBs(
    llvm::IRTranslator::CFGEdge Edge)

Description

Returns the Machine IR predecessors for the given IR CFG edge. Usually this is just the single MachineBasicBlock corresponding to the predecessor in the IR. More complex lowering can result in multiple MachineBasicBlocks preceding the original though (e.g. switch instructions).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:685

Parameters

llvm::IRTranslator::CFGEdge Edge

llvm::Align getMemOpAlign(
    const llvm::Instruction& I)

Description

Get the alignment of the given memory operation instruction. This will either be the explicitly specified value or the ABI-required alignment for the type being accessed (according to the Module's DataLayout).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:668

Parameters

const llvm::Instruction& I

int getOrCreateFrameIndex(
    const llvm::AllocaInst& AI)

Description

Get the frame index that represents \p Val. If such VReg does not exist, it is created.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:663

Parameters

const llvm::AllocaInst& AI

llvm::Register getOrCreateVReg(
    const llvm::Value& Val)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:648

Parameters

const llvm::Value& Val

ArrayRef<llvm::Register> getOrCreateVRegs(
    const llvm::Value& Val)

Description

Get the VRegs that represent \p Val. Non-aggregate types have just one corresponding VReg and the list can be used as a single "unsigned". Aggregates get flattened. If such VRegs do not exist, they are created.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:646

Parameters

const llvm::Value& Val

llvm::StringRef getPassName() const

Description

getPassName - Return a nice clean name for a pass. This usually implemented in terms of the name that is registered by one of the Registration templates, but can be overloaded directly.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:704

unsigned int getSimpleIntrinsicOpcode(
    Intrinsic::ID ID)

Description

Helper function for translateSimpleIntrinsic.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:235

Parameters

Intrinsic::ID ID

Returns

The generic opcode for \p IntrinsicID if \p IntrinsicID is a simple intrinsic (ceil, fabs, etc.). Otherwise, returns Intrinsic::not_intrinsic.

void getStackGuard(
    llvm::Register DstReg,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:224

Parameters

llvm::Register DstReg
llvm::MachineIRBuilder& MIRBuilder

bool lowerBitTestWorkItem(
    SwitchCG::SwitchWorkListItem W,
    llvm::MachineBasicBlock* SwitchMBB,
    llvm::MachineBasicBlock* CurMBB,
    llvm::MachineBasicBlock* DefaultMBB,
    llvm::MachineIRBuilder& MIB,
    MachineFunction::iterator BBI,
    llvm::BranchProbability DefaultProb,
    llvm::BranchProbability UnhandledProbs,
    SwitchCG::CaseClusterIt I,
    llvm::MachineBasicBlock* Fallthrough,
    bool FallthroughUnreachable)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:369

Parameters

SwitchCG::SwitchWorkListItem W
llvm::MachineBasicBlock* SwitchMBB
llvm::MachineBasicBlock* CurMBB
llvm::MachineBasicBlock* DefaultMBB
llvm::MachineIRBuilder& MIB
MachineFunction::iterator BBI
llvm::BranchProbability DefaultProb
llvm::BranchProbability UnhandledProbs
SwitchCG::CaseClusterIt I
llvm::MachineBasicBlock* Fallthrough
bool FallthroughUnreachable

bool lowerJumpTableWorkItem(
    SwitchCG::SwitchWorkListItem W,
    llvm::MachineBasicBlock* SwitchMBB,
    llvm::MachineBasicBlock* CurMBB,
    llvm::MachineBasicBlock* DefaultMBB,
    llvm::MachineIRBuilder& MIB,
    MachineFunction::iterator BBI,
    llvm::BranchProbability UnhandledProbs,
    SwitchCG::CaseClusterIt I,
    llvm::MachineBasicBlock* Fallthrough,
    bool FallthroughUnreachable)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:354

Parameters

SwitchCG::SwitchWorkListItem W
llvm::MachineBasicBlock* SwitchMBB
llvm::MachineBasicBlock* CurMBB
llvm::MachineBasicBlock* DefaultMBB
llvm::MachineIRBuilder& MIB
MachineFunction::iterator BBI
llvm::BranchProbability UnhandledProbs
SwitchCG::CaseClusterIt I
llvm::MachineBasicBlock* Fallthrough
bool FallthroughUnreachable

bool lowerSwitchRangeWorkItem(
    SwitchCG::CaseClusterIt I,
    llvm::Value* Cond,
    llvm::MachineBasicBlock* Fallthrough,
    bool FallthroughUnreachable,
    llvm::BranchProbability UnhandledProbs,
    llvm::MachineBasicBlock* CurMBB,
    llvm::MachineIRBuilder& MIB,
    llvm::MachineBasicBlock* SwitchMBB)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:361

Parameters

SwitchCG::CaseClusterIt I
llvm::Value* Cond
llvm::MachineBasicBlock* Fallthrough
bool FallthroughUnreachable
llvm::BranchProbability UnhandledProbs
llvm::MachineBasicBlock* CurMBB
llvm::MachineIRBuilder& MIB
llvm::MachineBasicBlock* SwitchMBB

bool lowerSwitchWorkItem(
    SwitchCG::SwitchWorkListItem W,
    llvm::Value* Cond,
    llvm::MachineBasicBlock* SwitchMBB,
    llvm::MachineBasicBlock* DefaultMBB,
    llvm::MachineIRBuilder& MIB)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:377

Parameters

SwitchCG::SwitchWorkListItem W
llvm::Value* Cond
llvm::MachineBasicBlock* SwitchMBB
llvm::MachineBasicBlock* DefaultMBB
llvm::MachineIRBuilder& MIB

bool runOnMachineFunction(
    llvm::MachineFunction& MF)

Description

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:720

Parameters

llvm::MachineFunction& MF

bool shouldEmitAsBranches(
    const std::vector<SwitchCG::CaseBlock>& Cases)

Description

If the set of cases should be emitted as a series of branches, return true. If we should emit this as a bunch of and/or'd together conditions, return false.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:314

Parameters

const std::vector<SwitchCG::CaseBlock>& Cases

bool translate(const llvm::Constant& C,
               llvm::Register Reg)

Description

Materialize \p C into virtual-register \p Reg. The generic instructions performing this materialization will be inserted into the entry block of the function.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:204

Parameters

const llvm::Constant& C
llvm::Register Reg

Returns

true if the materialization succeeded.

bool translate(const llvm::Instruction& Inst)

Description

Translate \p Inst into its corresponding MachineInstr instruction(s). Insert the newly translated instruction(s) right where the CurBuilder is set. The general algorithm is: 1. Look for a virtual register for each operand or create one. 2 Update the VMap accordingly. 2.alt. For constant arguments, if they are compile time constants, produce an immediate in the right operand and do not touch ValToReg. Actually we will go with a virtual register for each constants because it may be expensive to actually materialize the constant. Moreover, if the constant spans on several instructions, CSE may not catch them. => Update ValToVReg and remember that we saw a constant in Constants. We will materialize all the constants in finalize. Note: we would need to do something so that we can recognize such operand as constants. 3. Create the generic instruction.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:197

Parameters

const llvm::Instruction& Inst

Returns

true if the translation succeeded.

bool translateAShr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:479

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateAdd(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:405

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateAddrSpaceCast(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:526

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateAlloca(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:395

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateAnd(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:411

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateAtomicCmpXchg(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:507

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateAtomicRMW(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:508

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateBinaryOp(
    unsigned int Opcode,
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate \p Inst into a binary operation \p Opcode.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:308

Parameters

unsigned int Opcode
const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateBitCast(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate an LLVM bitcast into generic IR. Either a COPY or a G_BITCAST is emitted.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:212

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateBr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate branch (br) instruction.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:334

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCall(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate call instruction.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:255

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCallBase(
    const llvm::CallBase& CB,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Common code for translating normal calls or invokes.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:251

Parameters

const llvm::CallBase& CB
llvm::MachineIRBuilder& MIRBuilder

bool translateCallBr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:272

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCast(
    unsigned int Opcode,
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate one of LLVM's cast instructions into MachineInstrs, with the given generic Opcode.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:278

Parameters

unsigned int Opcode
const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCatchPad(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:532

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCatchRet(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:520

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCatchSwitch(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:523

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCleanupPad(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:529

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCleanupRet(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:517

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateCompare(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate a comparison (icmp or fcmp) instruction or constant.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:285

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateConstrainedFPIntrinsic(
    const llvm::ConstrainedFPIntrinsic& FPI,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:242

Parameters

const llvm::ConstrainedFPIntrinsic& FPI
llvm::MachineIRBuilder& MIRBuilder

bool translateCopy(
    const llvm::User& U,
    const llvm::Value& V,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:207

Parameters

const llvm::User& U
const llvm::Value& V
llvm::MachineIRBuilder& MIRBuilder

bool translateExtractElement(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:503

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateExtractValue(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:387

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFAdd(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:483

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFCmp(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate a floating-point compare instruction (or constant).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:293

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFDiv(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:492

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFMul(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:489

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFNeg(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:403

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFPExt(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:448

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFPToSI(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:454

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFPToUI(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:451

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFPTrunc(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:445

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFRem(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:495

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFSub(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:486

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFence(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:509

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateFixedPointIntrinsic(
    unsigned int Op,
    const llvm::CallInst& CI,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:228

Parameters

unsigned int Op
const llvm::CallInst& CI
llvm::MachineIRBuilder& MIRBuilder

bool translateFreeze(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:510

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateGetElementPtr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:393

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateICmp(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate an integer compare instruction (or constant).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:288

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateIndirectBr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:385

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateInlineAsm(
    const llvm::CallBase& CB,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:248

Parameters

const llvm::CallBase& CB
llvm::MachineIRBuilder& MIRBuilder

bool translateInsertElement(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:501

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateInsertValue(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:389

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateIntToPtr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:436

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateInvoke(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:270

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateKnownIntrinsic(
    const llvm::CallInst& CI,
    Intrinsic::ID ID,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:245

Parameters

const llvm::CallInst& CI
Intrinsic::ID ID
llvm::MachineIRBuilder& MIRBuilder

bool translateLShr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:476

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateLandingPad(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:274

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateLoad(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate an LLVM load instruction into generic IR.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:215

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateMemFunc(
    const llvm::CallInst& CI,
    llvm::MachineIRBuilder& MIRBuilder,
    unsigned int Opcode)

Description

Translate an LLVM string intrinsic (memcpy, memset, ...).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:221

Parameters

const llvm::CallInst& CI
llvm::MachineIRBuilder& MIRBuilder
unsigned int Opcode

bool translateMul(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:414

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateOr(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:417

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateOverflowIntrinsic(
    const llvm::CallInst& CI,
    unsigned int Op,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:226

Parameters

const llvm::CallInst& CI
unsigned int Op
llvm::MachineIRBuilder& MIRBuilder

bool translatePHI(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate a phi instruction.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:282

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translatePtrToInt(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:439

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateResume(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:514

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateRet(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate return (ret) instruction. The target needs to implement CallLowering::lowerReturn for this to succeed.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:401

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSDiv(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:427

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSExt(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:465

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSIToFP(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:460

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSRem(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:433

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSelect(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:391

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateShl(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:473

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateShuffleVector(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:505

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSimpleIntrinsic(
    const llvm::CallInst& CI,
    Intrinsic::ID ID,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translates the intrinsics defined in getSimpleIntrinsicOpcode.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:239

Parameters

const llvm::CallInst& CI
Intrinsic::ID ID
llvm::MachineIRBuilder& MIRBuilder

Returns

true if the translation succeeded.

bool translateStore(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate an LLVM store instruction into generic IR.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:218

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSub(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:408

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateSwitch(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:382

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateTrunc(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:442

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateUDiv(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:424

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateUIToFP(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:457

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateURem(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:430

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateUnaryOp(
    unsigned int Opcode,
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Description

Translate \p Inst into a unary operation \p Opcode.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:303

Parameters

unsigned int Opcode
const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateUnreachable(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:463

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateUserOp1(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:535

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateUserOp2(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:538

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateVAArg(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:499

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateXor(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:420

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder

bool translateZExt(
    const llvm::User& U,
    llvm::MachineIRBuilder& MIRBuilder)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h:469

Parameters

const llvm::User& U
llvm::MachineIRBuilder& MIRBuilder