class MachineRegisterInfo

Declaration

class MachineRegisterInfo { /* full declaration omitted */ };

Description

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:50

Member Variables

private llvm::MachineFunction* MF
private llvm::MachineRegisterInfo::Delegate* TheDelegate = nullptr
private const bool TracksSubRegLiveness
True if subregister liveness is tracked.
private IndexedMap< std::pair<RegClassOrRegBank, MachineOperand*>, llvm::VirtReg2IndexFunctor> VRegInfo
Each element in this list contains the register class of the vreg and the start of the use/def list for the register.
private IndexedMap<std::string, llvm::VirtReg2IndexFunctor> VReg2Name
Map for recovering vreg name from vreg number. This map is used by the MIR Printer.
private StringSet<> VRegNames
StringSet that is used to unique vreg names.
private bool IsUpdatedCSRsInitialized = false
The flag is true upon \p UpdatedCSRs initialization and false otherwise.
private SmallVector<llvm::MCPhysReg, 16> UpdatedCSRs
Contains the updated callee saved register list. As opposed to the static list defined in register info, all registers that were disabled are removed from the list.
private IndexedMap< std::pair<Register, SmallVector<Register, 4>>, llvm::VirtReg2IndexFunctor> RegAllocHints
RegAllocHints - This vector records register allocation hints for virtual registers. For each virtual register, it keeps a pair of hint type and hints vector making up the allocation hints. Only the first hint may be target specific, and in that case this is reflected by the first member of the pair being non-zero. If the hinted register is virtual, it means the allocator should prefer the physical register allocated to it if any.
private std::unique_ptr<MachineOperand*[]> PhysRegUseDefLists
PhysRegUseDefLists - This is an array of the head of the use/def list for physical registers.
private llvm::BitVector UsedPhysRegMask
UsedPhysRegMask - Additional used physregs including aliases. This bit vector represents all the registers clobbered by function calls.
private llvm::BitVector ReservedRegs
ReservedRegs - This is a bit vector of reserved registers. The target may change its mind about which registers should be reserved. This vector is the frozen set of reserved registers when register allocation started.
private llvm::MachineRegisterInfo::VRegToTypeMap VRegToType
Map generic virtual registers to their low-level type.
private std::vector<std::pair<MCRegister, Register>> LiveIns
Keep track of the physical registers that are live in to the function. Live in values are typically arguments in registers. LiveIn values are allowed to have virtual registers associated with them, stored in the second element.

Method Overview

Methods

void EmitLiveInCopies(
    llvm::MachineBasicBlock* EntryMBB,
    const llvm::TargetRegisterInfo& TRI,
    const llvm::TargetInstrInfo& TII)

Description

EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:982

Parameters

llvm::MachineBasicBlock* EntryMBB
const llvm::TargetRegisterInfo& TRI
const llvm::TargetInstrInfo& TII

MachineRegisterInfo(llvm::MachineFunction* MF)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:147

Parameters

llvm::MachineFunction* MF

MachineRegisterInfo(
    const llvm::MachineRegisterInfo&)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:148

Parameters

const llvm::MachineRegisterInfo& 

void addLiveIn(
    llvm::MCRegister Reg,
    llvm::Register vreg = llvm::Register())

Description

addLiveIn - Add the specified register as a live-in. Note that it is an error to add the same register to the same set more than once.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:954

Parameters

llvm::MCRegister Reg
llvm::Register vreg = llvm::Register()

void addPhysRegsUsedFromRegMask(
    const uint32_t* RegMask)

Description

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. This corresponds to the bit mask attached to register mask operands.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:876

Parameters

const uint32_t* RegMask

void addRegAllocationHint(llvm::Register VReg,
                          llvm::Register PrefReg)

Description

addRegAllocationHint - Add a register allocation hint to the hints vector for VReg.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:782

Parameters

llvm::Register VReg
llvm::Register PrefReg

void addRegOperandToUseList(
    llvm::MachineOperand* MO)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:255

Parameters

llvm::MachineOperand* MO

bool canReserveReg(llvm::MCRegister PhysReg) const

Description

canReserveReg - Returns true if PhysReg can be used as a reserved register. Any register can be reserved before freezeReservedRegs() is called.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:907

Parameters

llvm::MCRegister PhysReg

void clearKillFlags(llvm::Register Reg) const

Description

clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:622

Parameters

llvm::Register Reg

void clearSimpleHint(llvm::Register VReg)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:793

Parameters

llvm::Register VReg

void clearVirtRegTypes()

Description

Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:755

void clearVirtRegs()

Description

clearVirtRegs - Remove all virtual registers (after physreg assignment).

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:768

llvm::Register cloneVirtualRegister(
    llvm::Register VReg,
    llvm::StringRef Name = "")

Description

Create and return a new virtual register in the function with the same attributes as the given register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:736

Parameters

llvm::Register VReg
llvm::StringRef Name = ""

bool constrainRegAttrs(
    llvm::Register Reg,
    llvm::Register ConstrainingReg,
    unsigned int MinNumRegs = 0)

Description

Constrain the register class or the register bank of the virtual register\p Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type). Do nothing if any of the attributes (classes, banks, or low-level types) of the registers are deemed incompatible, or if the resulting register will have a class smaller than before and of size less than \p MinNumRegs. Return true if such register attributes exist, false otherwise.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:717

Parameters

llvm::Register Reg
llvm::Register ConstrainingReg
unsigned int MinNumRegs = 0

const llvm::TargetRegisterClass*
constrainRegClass(
    llvm::Register Reg,
    const llvm::TargetRegisterClass* RC,
    unsigned int MinNumRegs = 0)

Description

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:702

Parameters

llvm::Register Reg
const llvm::TargetRegisterClass* RC
unsigned int MinNumRegs = 0

llvm::Register createGenericVirtualRegister(
    llvm::LLT Ty,
    llvm::StringRef Name = "")

Description

Create and return a new generic virtual register with low-level type \p Ty.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:751

Parameters

llvm::LLT Ty
llvm::StringRef Name = ""

llvm::Register createIncompleteVirtualRegister(
    llvm::StringRef Name = "")

Description

Creates a new virtual register that has no register class, register bank or size assigned yet. This is only allowed to be used temporarily while constructing machine instructions. Most operations are undefined on an incomplete register until one of setRegClass(), setRegBank() or setSize() has been called on it.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:762

Parameters

llvm::StringRef Name = ""

llvm::Register createVirtualRegister(
    const llvm::TargetRegisterClass* RegClass,
    llvm::StringRef Name = "")

Description

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:731

Parameters

const llvm::TargetRegisterClass* RegClass
llvm::StringRef Name = ""

llvm::MachineRegisterInfo::def_iterator def_begin(
    llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:392

Parameters

llvm::Register RegNo

llvm::MachineRegisterInfo::def_bundle_iterator
def_bundle_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:421

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    def_bundle_iterator
    def_bundle_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:424

inline iterator_range<llvm::MachineRegisterInfo::
                          def_bundle_iterator>
def_bundles(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:428

Parameters

llvm::Register Reg

bool def_empty(llvm::Register RegNo) const

Description

def_empty - Return true if there are no instructions defining the specified register (it may be live-in).

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:434

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::def_iterator
def_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:395

llvm::MachineRegisterInfo::def_instr_iterator
def_instr_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:405

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    def_instr_iterator
    def_instr_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:408

inline iterator_range<
    llvm::MachineRegisterInfo::def_instr_iterator>
def_instructions(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:413

Parameters

llvm::Register Reg

inline iterator_range<
    llvm::MachineRegisterInfo::def_iterator>
def_operands(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:397

Parameters

llvm::Register Reg

void disableCalleeSavedRegister(
    llvm::MCRegister Reg)

Description

Disables the register from the list of CSRs. I.e. the register will not appear as part of the CSR mask.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:243

Parameters

llvm::MCRegister Reg

void dumpUses(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:624

Parameters

llvm::Register RegNo

void freezeReservedRegs(
    const llvm::MachineFunction&)

Description

freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:896

Parameters

const llvm::MachineFunction& 

const llvm::MCPhysReg* getCalleeSavedRegs() const

Description

Returns list of callee saved registers. The function returns the updated CSR list (after taking into account registers that are disabled from the CSR list).

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:248

llvm::MCRegister getLiveInPhysReg(
    llvm::Register VReg) const

Description

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:974

Parameters

llvm::Register VReg

llvm::Register getLiveInVirtReg(
    llvm::MCRegister PReg) const

Description

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in virtual register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:978

Parameters

llvm::MCRegister PReg

llvm::LaneBitmask getMaxLaneMaskForVReg(
    llvm::Register Reg) const

Description

Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register @p Reg.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:988

Parameters

llvm::Register Reg

static llvm::MachineOperand* getNextOperandForReg(
    const llvm::MachineOperand* MO)

Description

Get the next element in the use-def chain.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:121

Parameters

const llvm::MachineOperand* MO

unsigned int getNumVirtRegs() const

Description

getNumVirtRegs - Return the number of virtual registers created.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:765

llvm::MachineOperand* getOneDef(
    llvm::Register Reg) const

Description

Returns the defining operand if there is exactly one operand defining the specified register, otherwise nullptr.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:458

Parameters

llvm::Register Reg

llvm::PSetIterator getPressureSets(
    llvm::Register RegUnit) const

Description

Get an iterator over the pressure sets affected by the given physical or virtual register. If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:633

Parameters

llvm::Register RegUnit

std::pair<Register, Register>
getRegAllocationHint(llvm::Register VReg) const

Description

getRegAllocationHint - Return the register allocation hint for the specified virtual register. If there are many hints, this returns the one with the greatest weight.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:803

Parameters

llvm::Register VReg

const std::pair<Register,
                SmallVector<Register, 4>>&
getRegAllocationHints(llvm::Register VReg) const

Description

getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:822

Parameters

llvm::Register VReg

const llvm::RegisterBank* getRegBankOrNull(
    llvm::Register Reg) const

Description

Return the register bank of \p Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:668

Parameters

llvm::Register Reg

const llvm::TargetRegisterClass* getRegClass(
    llvm::Register Reg) const

Description

Return the register class of the specified virtual register. This shouldn't be used directly unless \p Reg has a register class.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:642

Parameters

llvm::Register Reg

const llvm::TargetRegisterClass*
getRegClassOrNull(llvm::Register Reg) const

Description

Return the register class of \p Reg, or null if Reg has not been assigned a register class yet.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:659

Parameters

llvm::Register Reg

const llvm::RegClassOrRegBank&
getRegClassOrRegBank(llvm::Register Reg) const

Description

Return the register bank or register class of \p Reg.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:676

Parameters

llvm::Register Reg

llvm::MachineOperand* getRegUseDefListHead(
    llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:114

Parameters

llvm::Register RegNo

llvm::MachineOperand*& getRegUseDefListHead(
    llvm::Register RegNo)

Description

getRegUseDefListHead - Return the head pointer for the register use/def list for the specified virtual or physical register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:108

Parameters

llvm::Register RegNo

const llvm::BitVector& getReservedRegs() const

Description

getReservedRegs - Returns a reference to the frozen set of reserved registers. This method should always be preferred to calling TRI::getReservedRegs() when possible.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:914

llvm::Register getSimpleHint(
    llvm::Register VReg) const

Description

getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:813

Parameters

llvm::Register VReg

const llvm::TargetRegisterInfo*
getTargetRegisterInfo() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:151

llvm::LLT getType(llvm::Register Reg) const

Description

Get the low-level type of \p Reg or LLT{} if Reg is not a generic (target independent) virtual register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:740

Parameters

llvm::Register Reg

llvm::MachineInstr* getUniqueVRegDef(
    llvm::Register Reg) const

Description

getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. If there are multiple definitions or no definition, return null.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:616

Parameters

llvm::Register Reg

const llvm::BitVector& getUsedPhysRegsMask() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:880

llvm::MachineInstr* getVRegDef(
    llvm::Register Reg) const

Description

getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. This assumes that the code is in SSA form, so there should only be one definition.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:611

Parameters

llvm::Register Reg

llvm::StringRef getVRegName(
    llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:436

Parameters

llvm::Register Reg

bool hasOneDef(llvm::Register RegNo) const

Description

Return true if there is exactly one operand defining the specified register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:452

Parameters

llvm::Register RegNo

bool hasOneNonDBGUse(llvm::Register RegNo) const

Description

hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:580

Parameters

llvm::Register RegNo

bool hasOneNonDBGUser(llvm::Register RegNo) const

Description

hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register. Said instruction may have multiple uses.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:585

Parameters

llvm::Register RegNo

bool hasOneUse(llvm::Register RegNo) const

Description

hasOneUse - Return true if there is exactly one instruction using the specified register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:518

Parameters

llvm::Register RegNo

void insertVRegByName(llvm::StringRef Name,
                      llvm::Register Reg)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:440

Parameters

llvm::StringRef Name
llvm::Register Reg

void invalidateLiveness()

Description

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately. This should be called by late passes that invalidate the liveness information.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:205

bool isAllocatable(llvm::MCRegister PhysReg) const

Description

isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved. Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:943

Parameters

llvm::MCRegister PhysReg

bool isArgumentRegister(
    const llvm::MachineFunction& MF,
    llvm::MCRegister Reg) const

Description

Returns true if a register can be used as an argument to a function.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:231

Parameters

const llvm::MachineFunction& MF
llvm::MCRegister Reg

bool isConstantPhysReg(
    llvm::MCRegister PhysReg) const

Description

Returns true if PhysReg is unallocatable and constant throughout the function. Writing to a constant register has no effect.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:628

Parameters

llvm::MCRegister PhysReg

bool isFixedRegister(
    const llvm::MachineFunction& MF,
    llvm::MCRegister Reg) const

Description

Returns true if a register is a fixed register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:234

Parameters

const llvm::MachineFunction& MF
llvm::MCRegister Reg

bool isGeneralPurposeRegister(
    const llvm::MachineFunction& MF,
    llvm::MCRegister Reg) const

Description

Returns true if a register is a general purpose register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:237

Parameters

const llvm::MachineFunction& MF
llvm::MCRegister Reg

bool isLiveIn(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:970

Parameters

llvm::Register Reg

bool isPhysRegModified(
    llvm::MCRegister PhysReg,
    bool SkipNoReturnDef = false) const

Description

Return true if the specified register is modified in this function. This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored, to consider them pass 'true' for optional parameter SkipNoReturnDef. The register is also considered modified when it is set in the UsedPhysRegMask.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:866

Parameters

llvm::MCRegister PhysReg
bool SkipNoReturnDef = false

bool isPhysRegUsed(
    llvm::MCRegister PhysReg,
    bool SkipRegMaskTest = false) const

Description

Return true if the specified register is modified or read in this function. This checks that no machine operands exist for the register or any of its aliases. If SkipRegMaskTest is false, the register is considered used when it is set in the UsedPhysRegMask.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:872

Parameters

llvm::MCRegister PhysReg
bool SkipRegMaskTest = false

bool isReserved(llvm::MCRegister PhysReg) const

Description

isReserved - Returns true when PhysReg is a reserved register. Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:925

Parameters

llvm::MCRegister PhysReg

bool isReservedRegUnit(unsigned int Unit) const

Description

Returns true when the given register unit is considered reserved. Register units are considered reserved when for at least one of their root registers, the root register and all super registers are reserved. This currently iterates the register hierarchy and may be slower than expected.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:935

Parameters

unsigned int Unit

bool isSSA() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:183

bool isUpdatedCSRsInitialized() const

Description

Returns true if the updated CSR list was initialized and false otherwise.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:228

void leaveSSA()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:189

llvm::MachineRegisterInfo::livein_iterator
livein_begin() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:962

bool livein_empty() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:964

llvm::MachineRegisterInfo::livein_iterator
livein_end() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:963

ArrayRef<std::pair<MCRegister, Register>>
liveins() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:966

void markUsesInDebugValueAsUndef(
    llvm::Register Reg) const

Description

markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:830

Parameters

llvm::Register Reg

void moveOperands(llvm::MachineOperand* Dst,
                  llvm::MachineOperand* Src,
                  unsigned int NumOps)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:261

Parameters

llvm::MachineOperand* Dst
llvm::MachineOperand* Src
unsigned int NumOps

bool recomputeRegClass(llvm::Register Reg)

Description

recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. Returns true if Reg was upgraded. This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:727

Parameters

llvm::Register Reg

llvm::MachineRegisterInfo::reg_iterator reg_begin(
    llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:289

Parameters

llvm::Register RegNo

llvm::MachineRegisterInfo::reg_bundle_iterator
reg_bundle_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:318

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    reg_bundle_iterator
    reg_bundle_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:321

llvm::MachineRegisterInfo::
    reg_bundle_nodbg_iterator
    reg_bundle_nodbg_begin(
        llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:371

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    reg_bundle_nodbg_iterator
    reg_bundle_nodbg_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:374

inline iterator_range<llvm::MachineRegisterInfo::
                          reg_bundle_iterator>
reg_bundles(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:325

Parameters

llvm::Register Reg

bool reg_empty(llvm::Register RegNo) const

Description

reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:331

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::reg_iterator
reg_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:292

llvm::MachineRegisterInfo::reg_instr_iterator
reg_instr_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:302

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    reg_instr_iterator
    reg_instr_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:305

llvm::MachineRegisterInfo::
    reg_instr_nodbg_iterator
    reg_instr_nodbg_begin(
        llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:354

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    reg_instr_nodbg_iterator
    reg_instr_nodbg_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:357

inline iterator_range<
    llvm::MachineRegisterInfo::reg_instr_iterator>
reg_instructions(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:310

Parameters

llvm::Register Reg

llvm::MachineRegisterInfo::reg_nodbg_iterator
reg_nodbg_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:337

Parameters

llvm::Register RegNo

inline iterator_range<
    llvm::MachineRegisterInfo::
        reg_bundle_nodbg_iterator>
reg_nodbg_bundles(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:379

Parameters

llvm::Register Reg

bool reg_nodbg_empty(llvm::Register RegNo) const

Description

reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:385

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    reg_nodbg_iterator
    reg_nodbg_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:340

inline iterator_range<
    llvm::MachineRegisterInfo::
        reg_instr_nodbg_iterator>
reg_nodbg_instructions(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:362

Parameters

llvm::Register Reg

inline iterator_range<
    llvm::MachineRegisterInfo::reg_nodbg_iterator>
reg_nodbg_operands(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:345

Parameters

llvm::Register Reg

inline iterator_range<
    llvm::MachineRegisterInfo::reg_iterator>
reg_operands(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:294

Parameters

llvm::Register Reg

void removeRegOperandFromUseList(
    llvm::MachineOperand* MO)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:258

Parameters

llvm::MachineOperand* MO

void replaceRegWith(llvm::Register FromReg,
                    llvm::Register ToReg)

Description

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. Note that it is usually necessary to first constrain ToReg's register class and register bank to match the FromReg constraints using one of the methods: constrainRegClass(ToReg, getRegClass(FromReg)) constrainRegAttrs(ToReg, FromReg) RegisterBankInfo::constrainGenericRegister(ToReg, *MRI.getRegClass(FromReg), MRI) These functions will return a falsy result if the virtual registers have incompatible constraints. Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:606

Parameters

llvm::Register FromReg
llvm::Register ToReg

bool reservedRegsFrozen() const

Description

reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:900

void resetDelegate(
    llvm::MachineRegisterInfo::Delegate* delegate)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:155

Parameters

llvm::MachineRegisterInfo::Delegate* delegate

void setCalleeSavedRegs(
    ArrayRef<llvm::MCPhysReg> CSRs)

Description

Sets the updated Callee Saved Registers list. Notice that it will override ant previously disabled/saved CSRs.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:252

Parameters

ArrayRef<llvm::MCPhysReg> CSRs

void setDelegate(
    llvm::MachineRegisterInfo::Delegate* delegate)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:164

Parameters

llvm::MachineRegisterInfo::Delegate* delegate

void setRegAllocationHint(llvm::Register VReg,
                          unsigned int Type,
                          llvm::Register PrefReg)

Description

setRegAllocationHint - Specify a register allocation hint for the specified virtual register. This is typically used by target, and in case of an earlier hint it will be overwritten.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:773

Parameters

llvm::Register VReg
unsigned int Type
llvm::Register PrefReg

void setRegBank(llvm::Register Reg,
                const llvm::RegisterBank& RegBank)

Description

Set the register bank to \p RegBank for \p Reg.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:684

Parameters

llvm::Register Reg
const llvm::RegisterBank& RegBank

void setRegClass(
    llvm::Register Reg,
    const llvm::TargetRegisterClass* RC)

Description

setRegClass - Set the register class of the specified virtual register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:681

Parameters

llvm::Register Reg
const llvm::TargetRegisterClass* RC

void setRegClassOrRegBank(
    llvm::Register Reg,
    const llvm::RegClassOrRegBank& RCOrRB)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:686

Parameters

llvm::Register Reg
const llvm::RegClassOrRegBank& RCOrRB

void setSimpleHint(llvm::Register VReg,
                   llvm::Register PrefReg)

Description

Specify the preferred (target independent) register allocation hint for the specified virtual register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:789

Parameters

llvm::Register VReg
llvm::Register PrefReg

void setType(llvm::Register VReg, llvm::LLT Ty)

Description

Set the low-level type of \p VReg to \p Ty.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:747

Parameters

llvm::Register VReg
llvm::LLT Ty

bool shouldTrackSubRegLiveness(
    llvm::Register VReg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:215

Parameters

llvm::Register VReg

bool shouldTrackSubRegLiveness(
    const llvm::TargetRegisterClass& RC) const

Description

Returns true if liveness for register class @p RC should be tracked at the subregister level.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:212

Parameters

const llvm::TargetRegisterClass& RC

bool subRegLivenessEnabled() const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:219

bool tracksLiveness() const

Description

tracksLiveness - Returns true when tracking register liveness accurately. (see MachineFUnctionProperties::Property description for details)

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:195

void updateDbgUsersToReg(
    llvm::MCRegister OldReg,
    llvm::MCRegister NewReg,
    ArrayRef<llvm::MachineInstr*> Users) const

Description

updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:834

Parameters

llvm::MCRegister OldReg
llvm::MCRegister NewReg
ArrayRef<llvm::MachineInstr*> Users

llvm::MachineRegisterInfo::use_iterator use_begin(
    llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:472

Parameters

llvm::Register RegNo

llvm::MachineRegisterInfo::use_bundle_iterator
use_bundle_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:501

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    use_bundle_iterator
    use_bundle_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:504

llvm::MachineRegisterInfo::
    use_bundle_nodbg_iterator
    use_bundle_nodbg_begin(
        llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:560

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    use_bundle_nodbg_iterator
    use_bundle_nodbg_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:563

inline iterator_range<llvm::MachineRegisterInfo::
                          use_bundle_iterator>
use_bundles(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:508

Parameters

llvm::Register Reg

bool use_empty(llvm::Register RegNo) const

Description

use_empty - Return true if there are no instructions using the specified register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:514

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::use_iterator
use_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:475

llvm::MachineRegisterInfo::use_instr_iterator
use_instr_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:485

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    use_instr_iterator
    use_instr_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:488

llvm::MachineRegisterInfo::
    use_instr_nodbg_iterator
    use_instr_nodbg_begin(
        llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:543

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    use_instr_nodbg_iterator
    use_instr_nodbg_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:546

inline iterator_range<
    llvm::MachineRegisterInfo::use_instr_iterator>
use_instructions(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:493

Parameters

llvm::Register Reg

llvm::MachineRegisterInfo::use_nodbg_iterator
use_nodbg_begin(llvm::Register RegNo) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:526

Parameters

llvm::Register RegNo

inline iterator_range<
    llvm::MachineRegisterInfo::
        use_bundle_nodbg_iterator>
use_nodbg_bundles(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:568

Parameters

llvm::Register Reg

bool use_nodbg_empty(llvm::Register RegNo) const

Description

use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:574

Parameters

llvm::Register RegNo

static llvm::MachineRegisterInfo::
    use_nodbg_iterator
    use_nodbg_end()

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:529

inline iterator_range<
    llvm::MachineRegisterInfo::
        use_instr_nodbg_iterator>
use_nodbg_instructions(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:551

Parameters

llvm::Register Reg

inline iterator_range<
    llvm::MachineRegisterInfo::use_nodbg_iterator>
use_nodbg_operands(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:534

Parameters

llvm::Register Reg

inline iterator_range<
    llvm::MachineRegisterInfo::use_iterator>
use_operands(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:477

Parameters

llvm::Register Reg

void verifyUseList(llvm::Register Reg) const

Description

Verify the sanity of the use list for Reg.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:264

Parameters

llvm::Register Reg

void verifyUseLists() const

Description

Verify the use list of all registers.

Declared at: llvm/include/llvm/CodeGen/MachineRegisterInfo.h:267