class MachineOperand
Declaration
class MachineOperand { /* full declaration omitted */ };
Description
MachineOperand class - Representation of each machine instruction operand. This class isn't a POD type because it has a private constructor, but its destructor must be trivial. Functions like MachineInstr::addOperand(), MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on not having to call the MachineOperand destructor.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:48
Member Variables
- private unsigned int OpKind
- OpKind - Specify what kind of operand this is. This discriminates the union.
- private unsigned int SubReg_TargetFlags
- For all other kinds of operands, this field holds target-specific flags.
- private unsigned int TiedTo
- TiedTo - Non-zero when this register operand is tied to another register operand. The encoding of this field is described in the block comment before MachineInstr::tieOperands().
- private unsigned int IsDef
- IsDef - True if this is a def, false if this is a use of the register. This is only valid on register operands.
- private unsigned int IsImp
- IsImp - True if this is an implicit def or use, false if it is explicit. This is only valid on register opderands.
- private unsigned int IsDeadOrKill
- IsDeadOrKill For uses: IsKill - Conservatively indicates the last use of a register on this path through the function. A register operand with true value of this flag must be the last use of the register, a register operand with false value may or may not be the last use of the register. After regalloc we can use recomputeLivenessFlags to get precise kill flags. For defs: IsDead - True if this register is never used by a subsequent instruction. This is only valid on register operands.
- private unsigned int IsRenamable
- See isRenamable().
- private unsigned int IsUndef
- Any register can be used for %2, and its value doesn't matter, but the two operands must be the same register.
- private unsigned int IsInternalRead
- When this flag is set, the instruction bundle must contain at least one other def of the register. If multiple instructions in the bundle define the register, the meaning is target-defined.
- private unsigned int IsEarlyClobber
- IsEarlyClobber - True if this MO_Register 'def' operand is written to by the MachineInstr before all input registers are read. This is used to model the GCC inline asm ' & ' constraint modifier.
- private unsigned int IsDebug
- IsDebug - True if this MO_Register 'use' operand is in a debug pseudo, not a real instruction. Such uses should be ignored during codegen.
- private union(unnamed union at / home / hdoc / tmp / llvm - project / llvm / include / llvm / CodeGen / MachineOperand.h : 157 : 3) SmallContents
- private llvm::MachineInstr* ParentMI = nullptr
- ParentMI - This is the instruction that this operand is embedded into. This is valid for all operand types, when the operand is in an instr.
- private union ContentsUnion Contents
Method Overview
- public void ChangeToES(const char * SymName, unsigned int TargetFlags = 0)
- public void ChangeToFPImmediate(const llvm::ConstantFP * FPImm, unsigned int TargetFlags = 0)
- public void ChangeToFrameIndex(int Idx, unsigned int TargetFlags = 0)
- public void ChangeToGA(const llvm::GlobalValue * GV, int64_t Offset, unsigned int TargetFlags = 0)
- public void ChangeToImmediate(int64_t ImmVal, unsigned int TargetFlags = 0)
- public void ChangeToMCSymbol(llvm::MCSymbol * Sym, unsigned int TargetFlags = 0)
- public void ChangeToRegister(llvm::Register Reg, bool isDef, bool isImp = false, bool isKill = false, bool isDead = false, bool isUndef = false, bool isDebug = false)
- public void ChangeToTargetIndex(unsigned int Idx, int64_t Offset, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateBA(const llvm::BlockAddress * BA, int64_t Offset, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateCFIIndex(unsigned int CFIIndex)
- public static llvm::MachineOperand CreateCImm(const llvm::ConstantInt * CI)
- public static llvm::MachineOperand CreateCPI(unsigned int Idx, int Offset, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateES(const char * SymName, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateFI(int Idx)
- public static llvm::MachineOperand CreateFPImm(const llvm::ConstantFP * CFP)
- public static llvm::MachineOperand CreateGA(const llvm::GlobalValue * GV, int64_t Offset, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateImm(int64_t Val)
- public static llvm::MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
- public static llvm::MachineOperand CreateJTI(unsigned int Idx, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateMBB(llvm::MachineBasicBlock * MBB, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateMCSymbol(llvm::MCSymbol * Sym, unsigned int TargetFlags = 0)
- public static llvm::MachineOperand CreateMetadata(const llvm::MDNode * Meta)
- public static llvm::MachineOperand CreatePredicate(unsigned int Pred)
- public static llvm::MachineOperand CreateReg(llvm::Register Reg, bool isDef, bool isImp = false, bool isKill = false, bool isDead = false, bool isUndef = false, bool isEarlyClobber = false, unsigned int SubReg = 0, bool isDebug = false, bool isInternalRead = false, bool isRenamable = false)
- public static llvm::MachineOperand CreateRegLiveOut(const uint32_t * Mask)
- public static llvm::MachineOperand CreateRegMask(const uint32_t * Mask)
- public static llvm::MachineOperand CreateShuffleMask(ArrayRef<int> Mask)
- public static llvm::MachineOperand CreateTargetIndex(unsigned int Idx, int64_t Offset, unsigned int TargetFlags = 0)
- private MachineOperand(llvm::MachineOperand::MachineOperandType K)
- public void addTargetFlag(unsigned int F)
- public void clearParent()
- public static bool clobbersPhysReg(const uint32_t * RegMask, llvm::MCRegister PhysReg)
- public bool clobbersPhysReg(llvm::MCRegister PhysReg) const
- public void dump() const
- public const llvm::BlockAddress * getBlockAddress() const
- public unsigned int getCFIIndex() const
- public const llvm::ConstantInt * getCImm() const
- public const llvm::ConstantFP * getFPImm() const
- public const llvm::GlobalValue * getGlobal() const
- public int64_t getImm() const
- public int getIndex() const
- public Intrinsic::ID getIntrinsicID() const
- public llvm::MachineBasicBlock * getMBB() const
- public llvm::MCSymbol * getMCSymbol() const
- public const llvm::MDNode * getMetadata() const
- public int64_t getOffset() const
- public const llvm::MachineInstr * getParent() const
- public llvm::MachineInstr * getParent()
- public unsigned int getPredicate() const
- public llvm::Register getReg() const
- public const uint32_t * getRegLiveOut() const
- public const uint32_t * getRegMask() const
- public static unsigned int getRegMaskSize(unsigned int NumRegs)
- public ArrayRef<int> getShuffleMask() const
- public unsigned int getSubReg() const
- public const char * getSymbolName() const
- public unsigned int getTargetFlags() const
- public const char * getTargetIndexName() const
- public llvm::MachineOperand::MachineOperandType getType() const
- public bool isBlockAddress() const
- public bool isCFIIndex() const
- public bool isCImm() const
- public bool isCPI() const
- public bool isDead() const
- public bool isDebug() const
- public bool isDef() const
- public bool isEarlyClobber() const
- public bool isFI() const
- public bool isFPImm() const
- public bool isGlobal() const
- public bool isIdenticalTo(const llvm::MachineOperand & Other) const
- public bool isImm() const
- public bool isImplicit() const
- public bool isInternalRead() const
- public bool isIntrinsicID() const
- public bool isJTI() const
- public bool isKill() const
- public bool isMBB() const
- public bool isMCSymbol() const
- public bool isMetadata() const
- private bool isOnRegUseList() const
- public bool isPredicate() const
- public bool isReg() const
- public bool isRegLiveOut() const
- public bool isRegMask() const
- public bool isRenamable() const
- public bool isShuffleMask() const
- public bool isSymbol() const
- public bool isTargetIndex() const
- public bool isTied() const
- public bool isUndef() const
- public bool isUse() const
- public bool isValidExcessOperand() const
- public void print(llvm::raw_ostream & os, llvm::ModuleSlotTracker & MST, llvm::LLT TypeToPrint, Optional<unsigned int> OpIdx, bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies, unsigned int TiedOperandIdx, const llvm::TargetRegisterInfo * TRI, const llvm::TargetIntrinsicInfo * IntrinsicInfo) const
- public void print(llvm::raw_ostream & os, llvm::LLT TypeToPrint, const llvm::TargetRegisterInfo * TRI = nullptr, const llvm::TargetIntrinsicInfo * IntrinsicInfo = nullptr) const
- public void print(llvm::raw_ostream & os, const llvm::TargetRegisterInfo * TRI = nullptr, const llvm::TargetIntrinsicInfo * IntrinsicInfo = nullptr) const
- public static void printIRSlotNumber(llvm::raw_ostream & OS, int Slot)
- public static void printOperandOffset(llvm::raw_ostream & OS, int64_t Offset)
- public static void printStackObjectReference(llvm::raw_ostream & OS, unsigned int FrameIndex, bool IsFixed, llvm::StringRef Name)
- public static void printSubRegIdx(llvm::raw_ostream & OS, uint64_t Index, const llvm::TargetRegisterInfo * TRI)
- public static void printSymbol(llvm::raw_ostream & OS, llvm::MCSymbol & Sym)
- public static void printTargetFlags(llvm::raw_ostream & OS, const llvm::MachineOperand & Op)
- public bool readsReg() const
- private void removeRegFromUses()
- public void setCImm(const llvm::ConstantInt * CI)
- public void setFPImm(const llvm::ConstantFP * CFP)
- public void setImm(int64_t immVal)
- public void setImplicit(bool Val = true)
- public void setIndex(int Idx)
- public void setIntrinsicID(Intrinsic::ID IID)
- public void setIsDead(bool Val = true)
- public void setIsDebug(bool Val = true)
- public void setIsDef(bool Val = true)
- public void setIsEarlyClobber(bool Val = true)
- public void setIsInternalRead(bool Val = true)
- public void setIsKill(bool Val = true)
- public void setIsRenamable(bool Val = true)
- public void setIsUndef(bool Val = true)
- public void setIsUse(bool Val = true)
- public void setMBB(llvm::MachineBasicBlock * MBB)
- public void setMetadata(const llvm::MDNode * MD)
- public void setOffset(int64_t Offset)
- public void setPredicate(unsigned int Predicate)
- public void setReg(llvm::Register Reg)
- public void setRegMask(const uint32_t * RegMaskPtr)
- public void setSubReg(unsigned int subReg)
- public void setTargetFlags(unsigned int F)
- public void substPhysReg(llvm::MCRegister Reg, const llvm::TargetRegisterInfo &)
- public void substVirtReg(llvm::Register Reg, unsigned int SubIdx, const llvm::TargetRegisterInfo &)
Methods
¶void ChangeToES(const char* SymName,
unsigned int TargetFlags = 0)
void ChangeToES(const char* SymName,
unsigned int TargetFlags = 0)
Description
ChangeToES - Replace this operand with a new external symbol operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:750
Parameters
- const char* SymName
- unsigned int TargetFlags = 0
¶void ChangeToFPImmediate(
const llvm::ConstantFP* FPImm,
unsigned int TargetFlags = 0)
void ChangeToFPImmediate(
const llvm::ConstantFP* FPImm,
unsigned int TargetFlags = 0)
Description
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value. If an operand is known to be an FP immediate already, the setFPImm method should be used.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:747
Parameters
- const llvm::ConstantFP* FPImm
- unsigned int TargetFlags = 0
¶void ChangeToFrameIndex(
int Idx,
unsigned int TargetFlags = 0)
void ChangeToFrameIndex(
int Idx,
unsigned int TargetFlags = 0)
Description
Replace this operand with a frame index.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:760
Parameters
- int Idx
- unsigned int TargetFlags = 0
¶void ChangeToGA(const llvm::GlobalValue* GV,
int64_t Offset,
unsigned int TargetFlags = 0)
void ChangeToGA(const llvm::GlobalValue* GV,
int64_t Offset,
unsigned int TargetFlags = 0)
Description
ChangeToGA - Replace this operand with a new global address operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:753
Parameters
- const llvm::GlobalValue* GV
- int64_t Offset
- unsigned int TargetFlags = 0
¶void ChangeToImmediate(
int64_t ImmVal,
unsigned int TargetFlags = 0)
void ChangeToImmediate(
int64_t ImmVal,
unsigned int TargetFlags = 0)
Description
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value. If an operand is known to be an immediate already, the setImm method should be used.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:742
Parameters
- int64_t ImmVal
- unsigned int TargetFlags = 0
¶void ChangeToMCSymbol(
llvm::MCSymbol* Sym,
unsigned int TargetFlags = 0)
void ChangeToMCSymbol(
llvm::MCSymbol* Sym,
unsigned int TargetFlags = 0)
Description
ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:757
Parameters
- llvm::MCSymbol* Sym
- unsigned int TargetFlags = 0
¶void ChangeToRegister(llvm::Register Reg,
bool isDef,
bool isImp = false,
bool isKill = false,
bool isDead = false,
bool isUndef = false,
bool isDebug = false)
void ChangeToRegister(llvm::Register Reg,
bool isDef,
bool isImp = false,
bool isKill = false,
bool isDead = false,
bool isUndef = false,
bool isDebug = false)
Description
ChangeToRegister - Replace this operand with a new register operand of the specified value. If an operand is known to be an register already, the setReg method should be used.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:769
Parameters
- llvm::Register Reg
- bool isDef
- bool isImp = false
- bool isKill = false
- bool isDead = false
- bool isUndef = false
- bool isDebug = false
¶void ChangeToTargetIndex(
unsigned int Idx,
int64_t Offset,
unsigned int TargetFlags = 0)
void ChangeToTargetIndex(
unsigned int Idx,
int64_t Offset,
unsigned int TargetFlags = 0)
Description
Replace this operand with a target index.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:763
Parameters
- unsigned int Idx
- int64_t Offset
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateBA(
const llvm::BlockAddress* BA,
int64_t Offset,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateBA(
const llvm::BlockAddress* BA,
int64_t Offset,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:875
Parameters
- const llvm::BlockAddress* BA
- int64_t Offset
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateCFIIndex(
unsigned int CFIIndex)
static llvm::MachineOperand CreateCFIIndex(
unsigned int CFIIndex)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:922
Parameters
- unsigned int CFIIndex
¶static llvm::MachineOperand CreateCImm(
const llvm::ConstantInt* CI)
static llvm::MachineOperand CreateCImm(
const llvm::ConstantInt* CI)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:788
Parameters
- const llvm::ConstantInt* CI
¶static llvm::MachineOperand CreateCPI(
unsigned int Idx,
int Offset,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateCPI(
unsigned int Idx,
int Offset,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:837
Parameters
- unsigned int Idx
- int Offset
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateES(
const char* SymName,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateES(
const char* SymName,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:867
Parameters
- const char* SymName
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateFI(int Idx)
static llvm::MachineOperand CreateFI(int Idx)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:832
Parameters
- int Idx
¶static llvm::MachineOperand CreateFPImm(
const llvm::ConstantFP* CFP)
static llvm::MachineOperand CreateFPImm(
const llvm::ConstantFP* CFP)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:794
Parameters
- const llvm::ConstantFP* CFP
¶static llvm::MachineOperand CreateGA(
const llvm::GlobalValue* GV,
int64_t Offset,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateGA(
const llvm::GlobalValue* GV,
int64_t Offset,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:859
Parameters
- const llvm::GlobalValue* GV
- int64_t Offset
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateImm(int64_t Val)
static llvm::MachineOperand CreateImm(int64_t Val)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:782
Parameters
- int64_t Val
¶static llvm::MachineOperand CreateIntrinsicID(
Intrinsic::ID ID)
static llvm::MachineOperand CreateIntrinsicID(
Intrinsic::ID ID)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:928
Parameters
- Intrinsic::ID ID
¶static llvm::MachineOperand CreateJTI(
unsigned int Idx,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateJTI(
unsigned int Idx,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:853
Parameters
- unsigned int Idx
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateMBB(
llvm::MachineBasicBlock* MBB,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateMBB(
llvm::MachineBasicBlock* MBB,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:825
Parameters
- llvm::MachineBasicBlock* MBB
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateMCSymbol(
llvm::MCSymbol* Sym,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateMCSymbol(
llvm::MCSymbol* Sym,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:913
Parameters
- llvm::MCSymbol* Sym
- unsigned int TargetFlags = 0
¶static llvm::MachineOperand CreateMetadata(
const llvm::MDNode* Meta)
static llvm::MachineOperand CreateMetadata(
const llvm::MDNode* Meta)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:907
Parameters
- const llvm::MDNode* Meta
¶static llvm::MachineOperand CreatePredicate(
unsigned int Pred)
static llvm::MachineOperand CreatePredicate(
unsigned int Pred)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:934
Parameters
- unsigned int Pred
¶static llvm::MachineOperand CreateReg(
llvm::Register Reg,
bool isDef,
bool isImp = false,
bool isKill = false,
bool isDead = false,
bool isUndef = false,
bool isEarlyClobber = false,
unsigned int SubReg = 0,
bool isDebug = false,
bool isInternalRead = false,
bool isRenamable = false)
static llvm::MachineOperand CreateReg(
llvm::Register Reg,
bool isDef,
bool isImp = false,
bool isKill = false,
bool isDead = false,
bool isUndef = false,
bool isEarlyClobber = false,
unsigned int SubReg = 0,
bool isDebug = false,
bool isInternalRead = false,
bool isRenamable = false)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:800
Parameters
- llvm::Register Reg
- bool isDef
- bool isImp = false
- bool isKill = false
- bool isDead = false
- bool isUndef = false
- bool isEarlyClobber = false
- unsigned int SubReg = 0
- bool isDebug = false
- bool isInternalRead = false
- bool isRenamable = false
¶static llvm::MachineOperand CreateRegLiveOut(
const uint32_t* Mask)
static llvm::MachineOperand CreateRegLiveOut(
const uint32_t* Mask)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:901
Parameters
- const uint32_t* Mask
¶static llvm::MachineOperand CreateRegMask(
const uint32_t* Mask)
static llvm::MachineOperand CreateRegMask(
const uint32_t* Mask)
Description
CreateRegMask - Creates a register mask operand referencing Mask. The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand. A RegMask operand represents a set of non-clobbered physical registers on an instruction that clobbers many registers, typically a call. The bit mask has a bit set for each physreg that is preserved by this instruction, as described in the documentation for TargetRegisterInfo::getCallPreservedMask(). Any physreg with a 0 bit in the mask is clobbered by the instruction.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:895
Parameters
- const uint32_t* Mask
¶static llvm::MachineOperand CreateShuffleMask(
ArrayRef<int> Mask)
static llvm::MachineOperand CreateShuffleMask(
ArrayRef<int> Mask)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:940
Parameters
- ArrayRef<int> Mask
¶static llvm::MachineOperand CreateTargetIndex(
unsigned int Idx,
int64_t Offset,
unsigned int TargetFlags = 0)
static llvm::MachineOperand CreateTargetIndex(
unsigned int Idx,
int64_t Offset,
unsigned int TargetFlags = 0)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:845
Parameters
- unsigned int Idx
- int64_t Offset
- unsigned int TargetFlags = 0
¶MachineOperand(
llvm::MachineOperand::MachineOperandType K)
MachineOperand(
llvm::MachineOperand::MachineOperandType K)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:201
Parameters
- llvm::MachineOperand::MachineOperandType K
¶void addTargetFlag(unsigned int F)
void addTargetFlag(unsigned int F)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:228
Parameters
- unsigned int F
¶void clearParent()
void clearParent()
Description
clearParent - Reset the parent pointer. The MachineOperand copy constructor also copies ParentMI, expecting the original to be deleted. If a MachineOperand is ever stored outside a MachineInstr, the parent pointer must be cleared. Never call clearParent() on an operand in a MachineInstr.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:248
¶static bool clobbersPhysReg(
const uint32_t* RegMask,
llvm::MCRegister PhysReg)
static bool clobbersPhysReg(
const uint32_t* RegMask,
llvm::MCRegister PhysReg)
Description
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg. It is sometimes necessary to detach the register mask pointer from its machine operand. This static method can be used for such detached bit mask pointers.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:626
Parameters
- const uint32_t* RegMask
- llvm::MCRegister PhysReg
¶bool clobbersPhysReg(
llvm::MCRegister PhysReg) const
bool clobbersPhysReg(
llvm::MCRegister PhysReg) const
Description
clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:633
Parameters
- llvm::MCRegister PhysReg
¶void dump() const
void dump() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:313
¶const llvm::BlockAddress* getBlockAddress() const
const llvm::BlockAddress* getBlockAddress() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:577
¶unsigned int getCFIIndex() const
unsigned int getCFIIndex() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:587
¶const llvm::ConstantInt* getCImm() const
const llvm::ConstantInt* getCImm() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:551
¶const llvm::ConstantFP* getFPImm() const
const llvm::ConstantFP* getFPImm() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:556
¶const llvm::GlobalValue* getGlobal() const
const llvm::GlobalValue* getGlobal() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:572
¶int64_t getImm() const
int64_t getImm() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:546
¶int getIndex() const
int getIndex() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:566
¶Intrinsic::ID getIntrinsicID() const
Intrinsic::ID getIntrinsicID() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:592
¶llvm::MachineBasicBlock* getMBB() const
llvm::MachineBasicBlock* getMBB() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:561
¶llvm::MCSymbol* getMCSymbol() const
llvm::MCSymbol* getMCSymbol() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:582
¶const llvm::MDNode* getMetadata() const
const llvm::MDNode* getMetadata() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:655
¶int64_t getOffset() const
int64_t getOffset() const
Description
Return the offset from the symbol in this operand. This always returns 0 for ExternalSymbol operands.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:609
¶const llvm::MachineInstr* getParent() const
const llvm::MachineInstr* getParent() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:238
¶llvm::MachineInstr* getParent()
llvm::MachineInstr* getParent()
Description
getParent - Return the instruction that this operand belongs to.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:237
¶unsigned int getPredicate() const
unsigned int getPredicate() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:597
¶llvm::Register getReg() const
llvm::Register getReg() const
Description
getReg - Returns the register number.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:359
¶const uint32_t* getRegLiveOut() const
const uint32_t* getRegLiveOut() const
Description
getRegLiveOut - Returns a bit mask of live-out registers.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:650
¶const uint32_t* getRegMask() const
const uint32_t* getRegMask() const
Description
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:639
¶static unsigned int getRegMaskSize(
unsigned int NumRegs)
static unsigned int getRegMaskSize(
unsigned int NumRegs)
Description
Returns number of elements needed for a regmask array.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:645
Parameters
- unsigned int NumRegs
¶ArrayRef<int> getShuffleMask() const
ArrayRef<int> getShuffleMask() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:602
¶unsigned int getSubReg() const
unsigned int getSubReg() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:364
¶const char* getSymbolName() const
const char* getSymbolName() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:617
¶unsigned int getTargetFlags() const
unsigned int getTargetFlags() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:220
¶const char* getTargetIndexName() const
const char* getTargetIndexName() const
Description
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name. Returns nullptr if the TargetIndex does not have a name. Asserts if MO is not a TargetIndex.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:776
¶llvm::MachineOperand::MachineOperandType getType()
const
llvm::MachineOperand::MachineOperandType getType()
const
Description
getType - Returns the MachineOperandType for this operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:218
¶bool isBlockAddress() const
bool isBlockAddress() const
Description
isBlockAddress - Tests if this is a MO_BlockAddress operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:342
¶bool isCFIIndex() const
bool isCFIIndex() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:350
¶bool isCImm() const
bool isCImm() const
Description
isCImm - Test if this is a MO_CImmediate operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:324
¶bool isCPI() const
bool isCPI() const
Description
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:332
¶bool isDead() const
bool isDead() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:384
¶bool isDebug() const
bool isDebug() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:445
¶bool isDef() const
bool isDef() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:374
¶bool isEarlyClobber() const
bool isEarlyClobber() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:435
¶bool isFI() const
bool isFI() const
Description
isFI - Tests if this is a MO_FrameIndex operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:330
¶bool isFPImm() const
bool isFPImm() const
Description
isFPImm - Tests if this is a MO_FPImmediate operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:326
¶bool isGlobal() const
bool isGlobal() const
Description
isGlobal - Tests if this is a MO_GlobalAddress operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:338
¶bool isIdenticalTo(
const llvm::MachineOperand& Other) const
bool isIdenticalTo(
const llvm::MachineOperand& Other) const
Description
Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead). Note that this should stay in sync with the hash_value overload below.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:729
Parameters
- const llvm::MachineOperand& Other
¶bool isImm() const
bool isImm() const
Description
isImm - Tests if this is a MO_Immediate operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:322
¶bool isImplicit() const
bool isImplicit() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:379
¶bool isInternalRead() const
bool isInternalRead() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:430
¶bool isIntrinsicID() const
bool isIntrinsicID() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:351
¶bool isJTI() const
bool isJTI() const
Description
isJTI - Tests if this is a MO_JumpTableIndex operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:336
¶bool isKill() const
bool isKill() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:389
¶bool isMBB() const
bool isMBB() const
Description
isMBB - Tests if this is a MO_MachineBasicBlock operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:328
¶bool isMCSymbol() const
bool isMCSymbol() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:349
¶bool isMetadata() const
bool isMetadata() const
Description
isMetadata - Tests if this is a MO_Metadata operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:348
¶bool isOnRegUseList() const
bool isOnRegUseList() const
Description
isOnRegUseList - Return true if this operand is on a register use/def list or false if not. This can only be called for register operands that are part of a machine instruction.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:969
¶bool isPredicate() const
bool isPredicate() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:352
¶bool isReg() const
bool isReg() const
Description
isReg - Tests if this is a MO_Register operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:320
¶bool isRegLiveOut() const
bool isRegLiveOut() const
Description
isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:346
¶bool isRegMask() const
bool isRegMask() const
Description
isRegMask - Tests if this is a MO_RegisterMask operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:344
¶bool isRenamable() const
bool isRenamable() const
Description
isRenamable - Returns true if this register may be renamed, i.e. it does not generate a value that is somehow read in a way that is not represented by the Machine IR (e.g. to meet an ABI or ISA requirement). This is only valid on physical register operands. Virtual registers are assumed to always be renamable regardless of the value of this field. Operands that are renamable can freely be changed to any other register that is a member of the register class returned by MI->getRegClassConstraint(). isRenamable can return false for several different reasons: - ABI constraints (since liveness is not always precisely modeled). We conservatively handle these cases by setting all physical register operands that didn’t start out as virtual regs to not be renamable. Also any physical register operands created after register allocation or whose register is changed after register allocation will not be renamable. This state is tracked in the MachineOperand::IsRenamable bit. - Opcode/target constraints: for opcodes that have complex register class requirements (e.g. that depend on other operands/instructions), we set hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq in the machine opcode description. Operands belonging to instructions with opcodes that are marked hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq return false from isRenamable(). Additionally, the AllowRegisterRenaming target property prevents any operands from being marked renamable for targets that don't have detailed opcode hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq values.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:428
¶bool isShuffleMask() const
bool isShuffleMask() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:353
¶bool isSymbol() const
bool isSymbol() const
Description
isSymbol - Tests if this is a MO_ExternalSymbol operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:340
¶bool isTargetIndex() const
bool isTargetIndex() const
Description
isTargetIndex - Tests if this is a MO_TargetIndex operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:334
¶bool isTied() const
bool isTied() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:440
¶bool isUndef() const
bool isUndef() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:394
¶bool isUse() const
bool isUse() const
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:369
¶bool isValidExcessOperand() const
bool isValidExcessOperand() const
Description
Return true if this operand can validly be appended to an arbitrary operand list. i.e. this behaves like an implicit operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:464
¶void print(llvm::raw_ostream& os,
llvm::ModuleSlotTracker& MST,
llvm::LLT TypeToPrint,
Optional<unsigned int> OpIdx,
bool PrintDef,
bool IsStandalone,
bool ShouldPrintRegisterTies,
unsigned int TiedOperandIdx,
const llvm::TargetRegisterInfo* TRI,
const llvm::TargetIntrinsicInfo*
IntrinsicInfo) const
void print(llvm::raw_ostream& os,
llvm::ModuleSlotTracker& MST,
llvm::LLT TypeToPrint,
Optional<unsigned int> OpIdx,
bool PrintDef,
bool IsStandalone,
bool ShouldPrintRegisterTies,
unsigned int TiedOperandIdx,
const llvm::TargetRegisterInfo* TRI,
const llvm::TargetIntrinsicInfo*
IntrinsicInfo) const
Description
More complex way of printing a MachineOperand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:301
Parameters
- llvm::raw_ostream& os
- llvm::ModuleSlotTracker& MST
- llvm::LLT TypeToPrint
- specifies the generic type to be printed on uses and defs. It can be determined using MachineInstr::getTypeToPrint.
- Optional<unsigned int> OpIdx
- - specifies the index of the operand in machine instruction. This will be used by target dependent MIR formatter. Could be None if the index is unknown, e.g. called by dump().
- bool PrintDef
- - whether we want to print `def` on an operand which isDef. Sometimes, if the operand is printed before '=', we don't print `def`.
- bool IsStandalone
- - whether we want a verbose output of the MO. This prints extra information that can be easily inferred when printing the whole function, but not when printing only a fragment of it.
- bool ShouldPrintRegisterTies
- - whether we want to print register ties. Sometimes they are easily determined by the instruction's descriptor (MachineInstr::hasComplexRegiterTies can determine if it's needed).
- unsigned int TiedOperandIdx
- - if we need to print register ties this needs to provide the index of the tied register. If not, it will be ignored.
- const llvm::TargetRegisterInfo* TRI
- - provide more target-specific information to the printer. Unlike the previous function, this one will not try and get the information from it's parent.
- const llvm::TargetIntrinsicInfo* IntrinsicInfo
- - same as \p TRI.
¶void print(
llvm::raw_ostream& os,
llvm::LLT TypeToPrint,
const llvm::TargetRegisterInfo* TRI = nullptr,
const llvm::TargetIntrinsicInfo*
IntrinsicInfo = nullptr) const
void print(
llvm::raw_ostream& os,
llvm::LLT TypeToPrint,
const llvm::TargetRegisterInfo* TRI = nullptr,
const llvm::TargetIntrinsicInfo*
IntrinsicInfo = nullptr) const
Description
Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level type to be printed the same way the full version of print(...) does it.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:309
Parameters
- llvm::raw_ostream& os
- llvm::LLT TypeToPrint
- const llvm::TargetRegisterInfo* TRI = nullptr
- const llvm::TargetIntrinsicInfo* IntrinsicInfo = nullptr
¶void print(
llvm::raw_ostream& os,
const llvm::TargetRegisterInfo* TRI = nullptr,
const llvm::TargetIntrinsicInfo*
IntrinsicInfo = nullptr) const
void print(
llvm::raw_ostream& os,
const llvm::TargetRegisterInfo* TRI = nullptr,
const llvm::TargetIntrinsicInfo*
IntrinsicInfo = nullptr) const
Description
Print the MachineOperand to \p os. Providing a valid \p TRI and \p IntrinsicInfo results in a more target-specific printing. If \p TRI and \p IntrinsicInfo are null, the function will try to pick it up from the parent.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:277
Parameters
- llvm::raw_ostream& os
- const llvm::TargetRegisterInfo* TRI = nullptr
- const llvm::TargetIntrinsicInfo* IntrinsicInfo = nullptr
¶static void printIRSlotNumber(
llvm::raw_ostream& OS,
int Slot)
static void printIRSlotNumber(
llvm::raw_ostream& OS,
int Slot)
Description
Print an IRSlotNumber.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:271
Parameters
- llvm::raw_ostream& OS
- int Slot
¶static void printOperandOffset(
llvm::raw_ostream& OS,
int64_t Offset)
static void printOperandOffset(
llvm::raw_ostream& OS,
int64_t Offset)
Description
Print the offset with explicit +/- signs.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:268
Parameters
- llvm::raw_ostream& OS
- int64_t Offset
¶static void printStackObjectReference(
llvm::raw_ostream& OS,
unsigned int FrameIndex,
bool IsFixed,
llvm::StringRef Name)
static void printStackObjectReference(
llvm::raw_ostream& OS,
unsigned int FrameIndex,
bool IsFixed,
llvm::StringRef Name)
Description
Print a stack object reference.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:264
Parameters
- llvm::raw_ostream& OS
- unsigned int FrameIndex
- bool IsFixed
- llvm::StringRef Name
¶static void printSubRegIdx(
llvm::raw_ostream& OS,
uint64_t Index,
const llvm::TargetRegisterInfo* TRI)
static void printSubRegIdx(
llvm::raw_ostream& OS,
uint64_t Index,
const llvm::TargetRegisterInfo* TRI)
Description
Print a subreg index operand. MO_Immediate operands can also be subreg idices. If it's the case, the subreg index name will be printed. MachineInstr::isOperandSubregIdx can be called to check this.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:254
Parameters
- llvm::raw_ostream& OS
- uint64_t Index
- const llvm::TargetRegisterInfo* TRI
¶static void printSymbol(llvm::raw_ostream& OS,
llvm::MCSymbol& Sym)
static void printSymbol(llvm::raw_ostream& OS,
llvm::MCSymbol& Sym)
Description
Print a MCSymbol as an operand.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:261
Parameters
- llvm::raw_ostream& OS
- llvm::MCSymbol& Sym
¶static void printTargetFlags(
llvm::raw_ostream& OS,
const llvm::MachineOperand& Op)
static void printTargetFlags(
llvm::raw_ostream& OS,
const llvm::MachineOperand& Op)
Description
Print operand target flags.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:258
Parameters
- llvm::raw_ostream& OS
- const llvm::MachineOperand& Op
¶bool readsReg() const
bool readsReg() const
Description
readsReg - Returns true if this operand reads the previous value of its register. A use operand with the <undef > flag set doesn't read its register. A sub-register def implicitly reads the other parts of the register being redefined unless the <undef > flag is set. This refers to reading the register value from before the current instruction or bundle. Internal bundle reads are not included.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:457
¶void removeRegFromUses()
void removeRegFromUses()
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:952
¶void setCImm(const llvm::ConstantInt* CI)
void setCImm(const llvm::ConstantInt* CI)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:669
Parameters
- const llvm::ConstantInt* CI
¶void setFPImm(const llvm::ConstantFP* CFP)
void setFPImm(const llvm::ConstantFP* CFP)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:674
Parameters
- const llvm::ConstantFP* CFP
¶void setImm(int64_t immVal)
void setImm(int64_t immVal)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:664
Parameters
- int64_t immVal
¶void setImplicit(bool Val = true)
void setImplicit(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:504
Parameters
- bool Val = true
¶void setIndex(int Idx)
void setIndex(int Idx)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:687
Parameters
- int Idx
¶void setIntrinsicID(Intrinsic::ID IID)
void setIntrinsicID(Intrinsic::ID IID)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:712
Parameters
- Intrinsic::ID IID
¶void setIsDead(bool Val = true)
void setIsDead(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:515
Parameters
- bool Val = true
¶void setIsDebug(bool Val = true)
void setIsDebug(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:537
Parameters
- bool Val = true
¶void setIsDef(bool Val = true)
void setIsDef(bool Val = true)
Description
Change a def to a use, or a use to a def.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:502
Parameters
- bool Val = true
¶void setIsEarlyClobber(bool Val = true)
void setIsEarlyClobber(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:532
Parameters
- bool Val = true
¶void setIsInternalRead(bool Val = true)
void setIsInternalRead(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:527
Parameters
- bool Val = true
¶void setIsKill(bool Val = true)
void setIsKill(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:509
Parameters
- bool Val = true
¶void setIsRenamable(bool Val = true)
void setIsRenamable(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:525
Parameters
- bool Val = true
¶void setIsUndef(bool Val = true)
void setIsUndef(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:520
Parameters
- bool Val = true
¶void setIsUse(bool Val = true)
void setIsUse(bool Val = true)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:499
Parameters
- bool Val = true
¶void setMBB(llvm::MachineBasicBlock* MBB)
void setMBB(llvm::MachineBasicBlock* MBB)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:698
Parameters
¶void setMetadata(const llvm::MDNode* MD)
void setMetadata(const llvm::MDNode* MD)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:693
Parameters
- const llvm::MDNode* MD
¶void setOffset(int64_t Offset)
void setOffset(int64_t Offset)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:679
Parameters
- int64_t Offset
¶void setPredicate(unsigned int Predicate)
void setPredicate(unsigned int Predicate)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:717
Parameters
- unsigned int Predicate
¶void setReg(llvm::Register Reg)
void setReg(llvm::Register Reg)
Description
Change the register this operand corresponds to.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:478
Parameters
- llvm::Register Reg
¶void setRegMask(const uint32_t* RegMaskPtr)
void setRegMask(const uint32_t* RegMaskPtr)
Description
Sets value of register mask operand referencing Mask. The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand. See CreateRegMask(). Any physreg with a 0 bit in the mask is clobbered by the instruction.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:707
Parameters
- const uint32_t* RegMaskPtr
¶void setSubReg(unsigned int subReg)
void setSubReg(unsigned int subReg)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:480
Parameters
- unsigned int subReg
¶void setTargetFlags(unsigned int F)
void setTargetFlags(unsigned int F)
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:223
Parameters
- unsigned int F
¶void substPhysReg(llvm::MCRegister Reg,
const llvm::TargetRegisterInfo&)
void substPhysReg(llvm::MCRegister Reg,
const llvm::TargetRegisterInfo&)
Description
substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account. For instance, substPhysReg(%eax) will change %reg1024:sub_8bit to %al.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:497
Parameters
- llvm::MCRegister Reg
- const llvm::TargetRegisterInfo&
¶void substVirtReg(llvm::Register Reg,
unsigned int SubIdx,
const llvm::TargetRegisterInfo&)
void substVirtReg(llvm::Register Reg,
unsigned int SubIdx,
const llvm::TargetRegisterInfo&)
Description
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg. Take any existing SubReg index into account, using TargetRegisterInfo to compose the subreg indices if necessary. Reg must be a virtual register, SubIdx can be 0.
Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:491
Parameters
- llvm::Register Reg
- unsigned int SubIdx
- const llvm::TargetRegisterInfo&