class MachineInstr

Declaration

class MachineInstr : public ilist_node_with_parent { /* full declaration omitted */ };

Description

Representation of each machine instruction. This class isn't a POD type, but it must have a trivial destructor. When a MachineFunction is deleted, all the contained MachineInstrs are deallocated without having their destructor called.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:66

Inherits from: ilist_node_with_parent

Member Variables

private const llvm::MCInstrDesc* MCID
private llvm::MachineBasicBlock* Parent = nullptr
private llvm::MachineOperand* Operands = nullptr
private unsigned int NumOperands = 0
private uint16_t Flags = 0
private uint8_t AsmPrinterFlags = 0
private llvm::MachineInstr::OperandCapacity CapOperands
private PointerSumType< llvm::MachineInstr::ExtraInfoInlineKinds, PointerSumTypeMember< EIIK_MMO, llvm::MachineMemOperand*>, PointerSumTypeMember<EIIK_PreInstrSymbol, llvm::MCSymbol*>, PointerSumTypeMember<EIIK_PostInstrSymbol, llvm::MCSymbol*>, PointerSumTypeMember< EIIK_OutOfLine, llvm::MachineInstr::ExtraInfo*>> Info
private llvm::DebugLoc DbgLoc
private unsigned int DebugInstrNum
Unique instruction number. Used by DBG_INSTR_REFs to refer to the values defined by this instruction.

Method Overview

Methods

MachineInstr(llvm::MachineFunction&,
             const llvm::MachineInstr&)

Description

This constructor creates a copy of the given MachineInstr in the given MachineFunction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:267

Parameters

llvm::MachineFunction&
const llvm::MachineInstr& 

MachineInstr(llvm::MachineFunction&,
             const llvm::MCInstrDesc& TID,
             llvm::DebugLoc DL,
             bool NoImp = false)

Description

This constructor create a MachineInstr and add the implicit operands. It reserves space for number of operands specified by MCInstrDesc. An explicit DebugLoc is supplied.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:272

Parameters

llvm::MachineFunction&
const llvm::MCInstrDesc& TID
llvm::DebugLoc DL
bool NoImp = false

MachineInstr(const llvm::MachineInstr&)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:283

Parameters

const llvm::MachineInstr& 

void addImplicitDefUseOperands(
    llvm::MachineFunction& MF)

Description

Add all implicit def and use operands to this instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1809

Parameters

llvm::MachineFunction& MF

void addMemOperand(llvm::MachineFunction& MF,
                   llvm::MachineMemOperand* MO)

Description

Add a MachineMemOperand to the machine instruction. This function should be used only occasionally. The setMemRefs function is the primary method for setting up a MachineInstr's MemRefs list.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1744

Parameters

llvm::MachineFunction& MF
llvm::MachineMemOperand* MO

void addOperand(llvm::MachineFunction& MF,
                const llvm::MachineOperand& Op)

Description

Add the specified operand to the instruction. If it is an implicit operand, it is added to the end of the operand list. If it is an explicit operand it is added at the end of the explicit operand list (before the first implicit operand). MF must be the machine function that was used to allocate this instruction. MachineInstrBuilder provides a more convenient interface for creating instructions and adding operands.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1705

Parameters

llvm::MachineFunction& MF
const llvm::MachineOperand& Op

void addOperand(const llvm::MachineOperand& Op)

Description

Add an operand without providing an MF reference. This only works for instructions that are inserted in a basic block. MachineInstrBuilder and the two-argument addOperand(MF, MO) should be preferred.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1712

Parameters

const llvm::MachineOperand& Op

void addRegOperandsToUseLists(
    llvm::MachineRegisterInfo&)

Description

Add all of the register operands in this instruction from their respective use lists. This requires that the operands not be on their use lists yet.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1851

Parameters

llvm::MachineRegisterInfo& 

bool addRegisterDead(
    llvm::Register Reg,
    const llvm::TargetRegisterInfo* RegInfo,
    bool AddIfNotFound = false)

Description

We have determined MI defined a register without a use. Look for the operand that defines it and mark it as IsDead. If AddIfNotFound is true, add a implicit operand if it's not found. Returns true if the operand exists / is added.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1566

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* RegInfo
bool AddIfNotFound = false

void addRegisterDefined(
    llvm::Register Reg,
    const llvm::TargetRegisterInfo* RegInfo =
        nullptr)

Description

We have determined MI defines a register. Make sure there is an operand defining Reg.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1579

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* RegInfo = nullptr

bool addRegisterKilled(
    llvm::Register IncomingReg,
    const llvm::TargetRegisterInfo* RegInfo,
    bool AddIfNotFound = false)

Description

We have determined MI kills a register. Look for the operand that uses it and mark it as IsKill. If AddIfNotFound is true, add a implicit operand if it's not found. Returns true if the operand exists / is added.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1554

Parameters

llvm::Register IncomingReg
const llvm::TargetRegisterInfo* RegInfo
bool AddIfNotFound = false

bool allDefsAreDead() const

Description

Return true if all the defs of this instruction are dead.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1639

void bundleWithPred()

Description

Bundle this instruction with its predecessor. This can be an unbundled instruction, or it can be the first instruction in a bundle.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:407

void bundleWithSucc()

Description

Bundle this instruction with its successor. This can be an unbundled instruction, or it can be the last instruction in a bundle.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:411

bool canFoldAsLoad(llvm::MachineInstr::QueryType
                       Type = IgnoreBundle) const

Description

Return true for instructions that can be folded as memory operands in other instructions. The most common use for this is instructions that are simple loads from memory that don't modify the loaded value in any way, but it can also be used for instructions that can be expressed as constant-pool loads, such as V_SETALLONES on x86, to allow them to be folded when it is beneficial. This should only be set on instructions that return a value in their only virtual register definition.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:955

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

void changeDebugValuesDefReg(llvm::Register Reg)

Description

Find all DBG_VALUEs that point to the register def in this instruction and point them to \p Reg instead.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1817

Parameters

llvm::Register Reg

void clearAsmPrinterFlag(
    llvm::MachineInstr::CommentFlag Flag)

Description

Clear specific AsmPrinter flags.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:322

Parameters

llvm::MachineInstr::CommentFlag Flag

void clearAsmPrinterFlags()

Description

Clear the AsmPrinter bitvector.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:309

void clearFlag(llvm::MachineInstr::MIFlag Flag)

Description

clearFlag - Clear a MI flag.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:348

Parameters

llvm::MachineInstr::MIFlag Flag

void clearKillInfo()

Description

Clears kill flags on all operands.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1543

void clearRegisterDeads(llvm::Register Reg)

Description

Clear all dead flags on operands defining register @p Reg.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1570

Parameters

llvm::Register Reg

void clearRegisterKills(
    llvm::Register Reg,
    const llvm::TargetRegisterInfo* RegInfo)

Description

Clear all kill flags affecting Reg. If RegInfo is provided, this includes all aliasing registers.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1560

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* RegInfo

void cloneInstrSymbols(
    llvm::MachineFunction& MF,
    const llvm::MachineInstr& MI)

Description

Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1781

Parameters

llvm::MachineFunction& MF
const llvm::MachineInstr& MI

void cloneMemRefs(llvm::MachineFunction& MF,
                  const llvm::MachineInstr& MI)

Description

Clone another MachineInstr's memory reference descriptor list and replace ours with it. Note that `*this` may be the incoming MI! Prefer this API whenever possible as it can avoid allocations in common cases.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1753

Parameters

llvm::MachineFunction& MF
const llvm::MachineInstr& MI

void cloneMergedMemRefs(
    llvm::MachineFunction& MF,
    ArrayRef<const llvm::MachineInstr*> MIs)

Description

Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it. Note that `*this` may be one of the incoming MIs! Prefer this API whenever possible as it can avoid allocations in common cases.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1762

Parameters

llvm::MachineFunction& MF
ArrayRef<const llvm::MachineInstr*> MIs

void collectDebugValues(
    SmallVectorImpl<llvm::MachineInstr*>&
        DbgValues)

Description

Scan instructions immediately following MI and collect any matching DBG_VALUEs.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1813

Parameters

SmallVectorImpl<llvm::MachineInstr*>& DbgValues

static uint16_t copyFlagsFromInstruction(
    const llvm::Instruction& I)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1794

Parameters

const llvm::Instruction& I

void copyIRFlags(const llvm::Instruction& I)

Description

Copy all flags to MachineInst MIFlags

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1797

Parameters

const llvm::Instruction& I

void copyImplicitOps(llvm::MachineFunction& MF,
                     const llvm::MachineInstr& MI)

Description

Copy implicit register operands from specified instruction to this instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1656

Parameters

llvm::MachineFunction& MF
const llvm::MachineInstr& MI

iterator_range<llvm::MachineInstr::mop_iterator>
debug_operands()

Description

Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:638

iterator_range<
    llvm::MachineInstr::const_mop_iterator>
debug_operands() const

Description

\copydoc debug_operands()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:645

bool definesRegister(
    llvm::Register Reg,
    const llvm::TargetRegisterInfo* TRI =
        nullptr) const

Description

Return true if the MachineInstr fully defines the specified register. If TargetRegisterInfo is passed, then it also checks if there is a def of a super-register. NOTE: It's ignoring subreg indices on virtual registers.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1373

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* TRI = nullptr

iterator_range<llvm::MachineInstr::mop_iterator>
defs()

Description

Returns a range over all explicit operands that are register definitions. Implicit definition are not included!

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:653

iterator_range<
    llvm::MachineInstr::const_mop_iterator>
defs() const

Description

\copydoc defs()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:658

void dropDebugNumber()

Description

Drop any variable location debugging information associated with this instruction. Use when an instruction is modified in such a way that it no longer defines the value it used to. Variable locations using that value will be dropped.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:477

void dropMemRefs(llvm::MachineFunction& MF)

Description

Clear this MachineInstr's memory reference descriptor list. This resets the memrefs to their most conservative state. This should be used only as a last resort since it greatly pessimizes our knowledge of the memory access performed by the instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1733

Parameters

llvm::MachineFunction& MF

void dump() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1685

void dumpr(const llvm::MachineRegisterInfo& MRI,
           unsigned int MaxDepth =
               (2147483647 * 2U + 1U)) const

Description

Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach \p MaxDepth.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1688

Parameters

const llvm::MachineRegisterInfo& MRI
unsigned int MaxDepth = (2147483647 * 2U + 1U)

void dumprImpl(
    const llvm::MachineRegisterInfo& MRI,
    unsigned int Depth,
    unsigned int MaxDepth,
    SmallPtrSetImpl<const llvm::MachineInstr*>&
        AlreadySeenInstrs) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:279

Parameters

const llvm::MachineRegisterInfo& MRI
unsigned int Depth
unsigned int MaxDepth
SmallPtrSetImpl<const llvm::MachineInstr*>& AlreadySeenInstrs

void emitError(llvm::StringRef Msg) const

Description

Emit an error referring to the source location of this instruction. This should only be used for inline assembly that is somehow impossible to compile. Other errors should have been handled much earlier. If this method returns, the caller should try to recover from the error.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:485

Parameters

llvm::StringRef Msg

void eraseFromBundle()

Description

Unlink 'this' form its basic block and delete it. If the instruction is part of a bundle, the other instructions in the bundle remain bundled.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1184

void eraseFromParent()

Description

Unlink 'this' from the containing basic block and delete it. If this instruction is the header of a bundle, the whole bundle is erased. This function can not be used for instructions inside a bundle, use eraseFromBundle() to erase individual bundled instructions.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1178

iterator_range<
    llvm::MachineInstr::const_mop_iterator>
explicit_operands() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:626

iterator_range<llvm::MachineInstr::mop_iterator>
explicit_operands()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:622

iterator_range<
    llvm::MachineInstr::const_mop_iterator>
explicit_uses() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:675

iterator_range<llvm::MachineInstr::mop_iterator>
explicit_uses()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:671

int findFirstPredOperandIdx() const

Description

Find the index of the first operand in the operand list that is used to represent the predicate. It returns -1 if none is found.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1450

int findInlineAsmFlagIdx(
    unsigned int OpIdx,
    unsigned int* GroupNo = nullptr) const

Description

Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction. Returns -1 if getOperand(OpIdx) does not belong to an inline asm operand group. If GroupNo is not NULL, it will receive the number of the operand group containing OpIdx.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1458

Parameters

unsigned int OpIdx
unsigned int* GroupNo = nullptr

const llvm::MachineOperand*
findRegisterDefOperand(
    llvm::Register Reg,
    bool isDead = false,
    bool Overlap = false,
    const llvm::TargetRegisterInfo* TRI =
        nullptr) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1440

Parameters

llvm::Register Reg
bool isDead = false
bool Overlap = false
const llvm::TargetRegisterInfo* TRI = nullptr

llvm::MachineOperand* findRegisterDefOperand(
    llvm::Register Reg,
    bool isDead = false,
    bool Overlap = false,
    const llvm::TargetRegisterInfo* TRI = nullptr)

Description

Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an index.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1432

Parameters

llvm::Register Reg
bool isDead = false
bool Overlap = false
const llvm::TargetRegisterInfo* TRI = nullptr

int findRegisterDefOperandIdx(
    llvm::Register Reg,
    bool isDead = false,
    bool Overlap = false,
    const llvm::TargetRegisterInfo* TRI =
        nullptr) const

Description

Returns the operand index that is a def of the specified register or -1 if it is not found. If isDead is true, defs that are not dead are skipped. If Overlap is true, then it also looks for defs that merely overlap the specified register. If TargetRegisterInfo is non-null, then it also checks if there is a def of a super-register. This may also return a register mask operand when Overlap is true.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1425

Parameters

llvm::Register Reg
bool isDead = false
bool Overlap = false
const llvm::TargetRegisterInfo* TRI = nullptr

const llvm::MachineOperand*
findRegisterUseOperand(
    llvm::Register Reg,
    bool isKill = false,
    const llvm::TargetRegisterInfo* TRI =
        nullptr) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1412

Parameters

llvm::Register Reg
bool isKill = false
const llvm::TargetRegisterInfo* TRI = nullptr

llvm::MachineOperand* findRegisterUseOperand(
    llvm::Register Reg,
    bool isKill = false,
    const llvm::TargetRegisterInfo* TRI = nullptr)

Description

Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1406

Parameters

llvm::Register Reg
bool isKill = false
const llvm::TargetRegisterInfo* TRI = nullptr

int findRegisterUseOperandIdx(
    llvm::Register Reg,
    bool isKill = false,
    const llvm::TargetRegisterInfo* TRI =
        nullptr) const

Description

Returns the operand index that is a use of the specific register or -1 if it is not found. It further tightens the search criteria to a use that kills the register if isKill is true.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1401

Parameters

llvm::Register Reg
bool isKill = false
const llvm::TargetRegisterInfo* TRI = nullptr

unsigned int findTiedOperandIdx(
    unsigned int OpIdx) const

Description

Given the index of a tied register operand, find the operand it is tied to. Defs are tied to uses and vice versa. Returns the index of the tied operand which must exist.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1513

Parameters

unsigned int OpIdx

bool getAsmPrinterFlag(
    llvm::MachineInstr::CommentFlag Flag) const

Description

Return whether an AsmPrinter flag is set.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:312

Parameters

llvm::MachineInstr::CommentFlag Flag

uint8_t getAsmPrinterFlags() const

Description

Return the asm printer flags bitvector.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:306

unsigned int getBundleSize() const

Description

Return the number of instructions inside the MI bundle, excluding the bundle header. This is the number of instructions that MachineBasicBlock::iterator skips, 0 for unbundled instructions.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1336

const llvm::DIExpression* getDebugExpression()
    const

Description

Return the complex address expression referenced by this DBG_VALUE instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:450

llvm::MachineOperand& getDebugExpressionOp()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:446

const llvm::MachineOperand& getDebugExpressionOp()
    const

Description

Return the operand for the complex address expression referenced by this DBG_VALUE instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:445

unsigned int getDebugInstrNum(
    llvm::MachineFunction& MF)

Description

Fetch instruction number of this MachineInstr -- but before it's inserted into \p MF. Needed for transformations that create an instruction but don't immediately insert them.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:463

Parameters

llvm::MachineFunction& MF

unsigned int getDebugInstrNum()

Description

Fetch the instruction number of this MachineInstr. If it does not have one already, a new and unique number will be assigned.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:458

const llvm::DILabel* getDebugLabel() const

Description

Return the debug label referenced by this DBG_LABEL instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:454

const llvm::DebugLoc& getDebugLoc() const

Description

Returns the debug location id of this MachineInstr.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:420

llvm::MachineOperand& getDebugOffset()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:429

const llvm::MachineOperand& getDebugOffset() const

Description

Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:425

const llvm::MachineOperand& getDebugOperand(
    unsigned int Index) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:514

Parameters

unsigned int Index

llvm::MachineOperand& getDebugOperand(
    unsigned int Index)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:510

Parameters

unsigned int Index

unsigned int getDebugOperandIndex(
    const llvm::MachineOperand* Op) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:563

Parameters

const llvm::MachineOperand* Op

template <typename Operand, typename Instruction>
static iterator_range<filter_iterator<
    Operand*,
    std::function<bool(Operand&)>>>
getDebugOperandsForReg(Instruction* MI,
                       llvm::Register Reg)

Description

Returns a range of all of the operands that correspond to a debug use of\p Reg.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:541

Templates

Operand
Instruction

Parameters

Instruction* MI
llvm::Register Reg

iterator_range<filter_iterator<
    const llvm::MachineOperand*,
    std::function<bool(const MachineOperand&)>>>
getDebugOperandsForReg(llvm::Register Reg) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:548

Parameters

llvm::Register Reg

iterator_range<filter_iterator<
    llvm::MachineOperand*,
    std::function<bool(MachineOperand&)>>>
getDebugOperandsForReg(llvm::Register Reg)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:554

Parameters

llvm::Register Reg

const llvm::DILocalVariable* getDebugVariable()
    const

Description

Return the debug variable referenced by this DBG_VALUE instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:441

const llvm::MachineOperand& getDebugVariableOp()
    const

Description

Return the operand for the debug variable referenced by this DBG_VALUE instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:436

llvm::MachineOperand& getDebugVariableOp()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:437

const llvm::MCInstrDesc& getDesc() const

Description

Returns the target instruction descriptor of this MachineInstr.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:488

bool getFlag(
    llvm::MachineInstr::MIFlag Flag) const

Description

Return whether an MI flag is set.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:332

Parameters

llvm::MachineInstr::MIFlag Flag

uint16_t getFlags() const

Description

Return the MI flags bitvector.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:327

Optional<unsigned int> getFoldedRestoreSize(
    const llvm::TargetInstrInfo* TII) const

Description

Return a valid size if the instruction is a folded restore instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1652

Parameters

const llvm::TargetInstrInfo* TII

Optional<unsigned int> getFoldedSpillSize(
    const llvm::TargetInstrInfo* TII) const

Description

Return a valid size if the instruction is a folded spill instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1645

Parameters

const llvm::TargetInstrInfo* TII

llvm::MDNode* getHeapAllocMarker() const

Description

Helper to extract a heap alloc marker if one has been added.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:751

InlineAsm::AsmDialect getInlineAsmDialect() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1271

unsigned int getIntrinsicID() const

Description

Returns the Intrinsic::ID for this instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1821

llvm::MachineFunction* getMF()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:300

const llvm::MachineFunction* getMF() const

Description

Return the function that contains the basic block that this instruction belongs to. Note: this is undefined behaviour if the instruction does not have a parent.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:299

unsigned int getNumDebugOperands() const

Description

Returns the total number of operands which are debug locations.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:497

unsigned int getNumDefs() const

Description

Returns the total number of definitions.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:569

unsigned int getNumExplicitDefs() const

Description

Returns the number of non-implicit definitions.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:604

unsigned int getNumExplicitOperands() const

Description

Returns the number of non-implicit operands.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:601

unsigned int getNumImplicitOperands() const

Description

Returns the implicit operands number.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:582

unsigned int getNumMemOperands() const

Description

Return the number of memory operands.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:724

unsigned int getNumOperands() const

Description

Retuns the total number of operands.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:494

unsigned int getOpcode() const

Description

Returns the opcode of this MachineInstr.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:491

const llvm::MachineOperand& getOperand(
    unsigned int i) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:501

Parameters

unsigned int i

llvm::MachineOperand& getOperand(unsigned int i)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:505

Parameters

unsigned int i

unsigned int getOperandNo(
    llvm::MachineInstr::const_mop_iterator I)
    const

Description

Returns the number of the operand iterator \p I points to.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:681

Parameters

llvm::MachineInstr::const_mop_iterator I

llvm::MachineBasicBlock* getParent()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:289

const llvm::MachineBasicBlock* getParent() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:288

llvm::MCSymbol* getPostInstrSymbol() const

Description

Helper to extract a post-instruction symbol if one has been added.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:739

llvm::MCSymbol* getPreInstrSymbol() const

Description

Helper to extract a pre-instruction symbol if one has been added.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:727

const llvm::TargetRegisterClass*
getRegClassConstraint(
    unsigned int OpIdx,
    const llvm::TargetInstrInfo* TII,
    const llvm::TargetRegisterInfo* TRI) const

Description

Compute the static register class constraint for operand OpIdx. For normal instructions, this is derived from the MCInstrDesc. For inline assembly it is derived from the flag words. Returns NULL if the static register class constraint cannot be determined.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1467

Parameters

unsigned int OpIdx
const llvm::TargetInstrInfo* TII
const llvm::TargetRegisterInfo* TRI

const llvm::TargetRegisterClass*
getRegClassConstraintEffect(
    unsigned int OpIdx,
    const llvm::TargetRegisterClass* CurRC,
    const llvm::TargetInstrInfo* TII,
    const llvm::TargetRegisterInfo* TRI) const

Description

Applies the constraints (def/use) implied by the \p OpIdx operand to the given \p CurRC. Returns the register class that satisfies both \p CurRC and the constraints set by \p OpIdx MI. Returns NULL if such a register class does not exist.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1498

Parameters

unsigned int OpIdx
const llvm::TargetRegisterClass* CurRC
const llvm::TargetInstrInfo* TII
const llvm::TargetRegisterInfo* TRI

const llvm::TargetRegisterClass*
getRegClassConstraintEffectForVReg(
    llvm::Register Reg,
    const llvm::TargetRegisterClass* CurRC,
    const llvm::TargetInstrInfo* TII,
    const llvm::TargetRegisterInfo* TRI,
    bool ExploreBundle = false) const

Description

Applies the constraints (def/use) implied by this MI on \p Reg to the given \p CurRC. If \p ExploreBundle is set and MI is part of a bundle, all the instructions inside the bundle will be taken into account. In other words, this method accumulates all the constraints of the operand of this MI and the related bundle if MI is a bundle or inside a bundle. Returns the register class that satisfies both \p CurRC and the constraints set by MI. Returns NULL if such a register class does not exist.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1483

Parameters

llvm::Register Reg
const llvm::TargetRegisterClass* CurRC
const llvm::TargetInstrInfo* TII
const llvm::TargetRegisterInfo* TRI
bool ExploreBundle = false

const llvm::TargetRegisterClass*
getRegClassConstraintEffectForVRegImpl(
    unsigned int OpIdx,
    llvm::Register Reg,
    const llvm::TargetRegisterClass* CurRC,
    const llvm::TargetInstrInfo* TII,
    const llvm::TargetRegisterInfo* TRI) const

Description

Implements the logic of getRegClassConstraintEffectForVReg for the this MI and the given operand index \p OpIdx. If the related operand does not constrained Reg, this returns CurRC.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1859

Parameters

unsigned int OpIdx
llvm::Register Reg
const llvm::TargetRegisterClass* CurRC
const llvm::TargetInstrInfo* TII
const llvm::TargetRegisterInfo* TRI

llvm::MachineRegisterInfo* getRegInfo()

Description

If this instruction is embedded into a MachineFunction, return the MachineRegisterInfo object for the current function, otherwise return null.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1841

Optional<unsigned int> getRestoreSize(
    const llvm::TargetInstrInfo* TII) const

Description

Return a valid size if the instruction is a restore instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1648

Parameters

const llvm::TargetInstrInfo* TII

Optional<unsigned int> getSpillSize(
    const llvm::TargetInstrInfo* TII) const

Description

Return a valid size if the instruction is a spill instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1642

Parameters

const llvm::TargetInstrInfo* TII

llvm::LLT getTypeToPrint(
    unsigned int OpIdx,
    llvm::SmallBitVector& PrintedTypes,
    const llvm::MachineRegisterInfo& MRI) const

Description

Debugging support @ { Determine the generic type to be printed (if needed) on uses and defs.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1661

Parameters

unsigned int OpIdx
llvm::SmallBitVector& PrintedTypes
const llvm::MachineRegisterInfo& MRI

SmallSet<llvm::Register, 4> getUsedDebugRegs()
    const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:519

bool hasComplexRegisterTies() const

Description

Return true when an instruction has tied register that can't be determined by the instruction's descriptor. This is useful for MIR printing, to determine whether we need to print the ties or not.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1667

bool hasDebugOperandForReg(
    llvm::Register Reg) const

Description

Returns whether this debug value has at least one debug operand with the register \p Reg.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:530

Parameters

llvm::Register Reg

bool hasDelaySlot(llvm::MachineInstr::QueryType
                      Type = AnyInBundle) const

Description

Returns true if the specified instruction has a delay slot which must be filled by the code generator.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:943

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool hasExtraDefRegAllocReq(
    llvm::MachineInstr::QueryType Type =
        AnyInBundle) const

Description

Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes. e.g. ARM::LDRD's two def registers must be an even / odd pair, ARM::LDM registers have to be in ascending order. Post-register allocation passes should not attempt to change allocations for definitions of instructions with this flag.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1140

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool hasExtraSrcRegAllocReq(
    llvm::MachineInstr::QueryType Type =
        AnyInBundle) const

Description

Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes. e.g. ARM::STRD's two source registers must be an even / odd pair, ARM::STM registers have to be in ascending order. Post-register allocation passes should not attempt to change allocations for sources of instructions with this flag.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1130

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool hasImplicitDef() const

Description

Returns true if the instruction has implicit definition.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:574

bool hasOneMemOperand() const

Description

Return true if this instruction has exactly one MachineMemOperand.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:721

bool hasOptionalDef(llvm::MachineInstr::QueryType
                        Type = IgnoreBundle) const

Description

Set if this instruction has an optional definition, e.g. ARM instructions which can set condition code if 's' bit is set.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:801

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool hasOrderedMemoryRef() const

Description

Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available. Return false if it is known to have no ordered or volatile memory references.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1611

bool hasPostISelHook(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this instruction requires *adjustment* after instruction selection by calling a target hook. For example, this can be used to fill in ARM 's' optional operand depending on whether the conditional flag register is used.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1099

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool hasProperty(unsigned int MCFlag,
                 llvm::MachineInstr::QueryType
                     Type = AnyInBundle) const

Description

Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has the specified property. The first argument is the property being queried. The second argument indicates whether the query should look inside instruction bundles.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:774

Parameters

unsigned int MCFlag
llvm::MachineInstr::QueryType Type = AnyInBundle

bool hasPropertyInBundle(
    uint64_t Mask,
    llvm::MachineInstr::QueryType Type) const

Description

Slow path for hasProperty when we're dealing with a bundle.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1854

Parameters

uint64_t Mask
llvm::MachineInstr::QueryType Type

bool hasRegisterImplicitUseOperand(
    llvm::Register Reg) const

Description

Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers).

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1396

Parameters

llvm::Register Reg

bool hasUnmodeledSideEffects() const

Description

Return true if this instruction has side effects that are not modeled by mayLoad / mayStore, etc. For all instructions, the property is encoded in MCInstrDesc::Flags (see MCInstrDesc::hasUnmodeledSideEffects(). The only exception is INLINEASM instruction, in which case the side effect property is encoded in one of its operands (see InlineAsm::Extra_HasSideEffect).

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1633

iterator_range<llvm::MachineInstr::mop_iterator>
implicit_operands()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:630

iterator_range<
    llvm::MachineInstr::const_mop_iterator>
implicit_operands() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:633

bool isAnnotationLabel() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1188

bool isAsCheapAsAMove(
    llvm::MachineInstr::QueryType Type =
        AllInBundle) const

Description

Returns true if this instruction has the same cost (or less) than a move instruction. This is useful during certain types of optimizations (e.g., remat during two-address conversion or machine licm) where we would like to remat or hoist the instruction, but not if it costs more than moving the instruction into the appropriate register. Note, we are not marking copies from and to the same register class with this flag.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1119

Parameters

llvm::MachineInstr::QueryType Type = AllInBundle

bool isBarrier(llvm::MachineInstr::QueryType
                   Type = AnyInBundle) const

Description

Returns true if the specified instruction stops control flow from executing the instruction immediately following it. Examples include unconditional branches and return instructions.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:842

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isBitcast(llvm::MachineInstr::QueryType
                   Type = IgnoreBundle) const

Description

Return true if this instruction is a bitcast instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:913

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isBranch(llvm::MachineInstr::QueryType Type =
                  AnyInBundle) const

Description

Returns true if this is a conditional, unconditional, or indirect branch. Predicates below can be used to discriminate between these cases, and the TargetInstrInfo::analyzeBranch method can be used to get more information.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:859

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isBundle() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1285

bool isBundled() const

Description

Return true if this instruction part of a bundle. This is true if either itself or its following instruction is marked "InsideBundle".

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:393

bool isBundledWithPred() const

Description

Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:399

bool isBundledWithSucc() const

Description

Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:403

bool isCFIInstruction() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1197

bool isCall(llvm::MachineInstr::QueryType Type =
                AnyInBundle) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:827

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isCandidateForCallSiteEntry(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this is a call instruction that may have an associated call site entry in the debug info.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:833

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isCommutable(llvm::MachineInstr::QueryType
                      Type = IgnoreBundle) const

Description

Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged. If this flag is set, then the TargetInstrInfo::commuteInstruction method may be used to hack on the instruction. Note that this flag may be set on instructions that are only commutable sometimes. In these cases, the call to commuteInstruction will fail. Also note that some instructions require non-trivial modification to commute them.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1061

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isCompare(llvm::MachineInstr::QueryType
                   Type = IgnoreBundle) const

Description

Return true if this instruction is a comparison.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:896

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isConditionalBranch(
    llvm::MachineInstr::QueryType Type =
        AnyInBundle) const

Description

Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block. The TargetInstrInfo::analyzeBranch method can be used to get more information about this branch.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:873

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

unsigned int isConstantValuePHI() const

Description

If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return 0.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1624

bool isConvergent(llvm::MachineInstr::QueryType
                      Type = AnyInBundle) const

Description

Return true if this instruction is convergent. Convergent instructions can not be made control-dependent on any additional values.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:932

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isConvertibleTo3Addr(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed. Doing this transformation can be profitable in the register allocator, because it means that the instruction can use a 2-address form if possible, but degrade into a less efficient form if the source and dest register cannot be assigned to the same register. For example, this allows the x86 backend to turn a "shl reg, 3" instruction into an LEA instruction, which is the same speed as the shift but has bigger code size. If this returns true, then the target must implement the TargetInstrInfo::convertToThreeAddress method for this instruction, which is allowed to fail if the transformation isn't valid for this specific instruction (e.g. shl reg, 4 on x86).

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1079

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isCopy() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1289

bool isCopyLike() const

Description

Return true if the instruction behaves like a copy. This does not include native copy instructions.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1303

bool isDebugEntryValue() const

Description

A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1239

bool isDebugInstr() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1220

bool isDebugLabel() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1217

bool isDebugOffsetImm() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1227

bool isDebugOperand(
    const llvm::MachineOperand* Op) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:559

Parameters

const llvm::MachineOperand* Op

bool isDebugOrPseudoInstr() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1223

bool isDebugPHI() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1219

bool isDebugRef() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1218

bool isDebugValue() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1214

bool isDebugValueList() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1211

bool isDereferenceableInvariantLoad() const

Description

Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function. Examples include loading a value from the constant pool or from the argument area of a function (if it does not change). If the instruction does multiple loads, this returns true only if all of the loads are dereferenceable and invariant.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1620

bool isEHLabel() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1186

bool isEHScopeReturn(llvm::MachineInstr::QueryType
                         Type = AnyInBundle) const

Description

Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:823

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isExtractSubreg() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1297

bool isExtractSubregLike(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions. E.g., on ARM, rX, rY VMOVRRD dZ is equivalent to two EXTRACT_SUBREG: rX = EXTRACT_SUBREG dZ, ssub_0 rY = EXTRACT_SUBREG dZ, ssub_1 Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getExtractSubregLikeInputs has to be override accordingly.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:984

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isFullCopy() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1293

bool isGCLabel() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1187

bool isIdenticalTo(
    const llvm::MachineInstr& Other,
    llvm::MachineInstr::MICheckType Check =
        CheckDefs) const

Description

Return true if this instruction is identical to \p Other. Two instructions are identical if they have the same opcode and all their operands are identical (with respect to MachineOperand::isIdenticalTo()). Note that this means liveness related flags (dead, undef, kill) do not affect the notion of identical.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1156

Parameters

const llvm::MachineInstr& Other
llvm::MachineInstr::MICheckType Check = CheckDefs

bool isIdentityCopy() const

Description

Return true is the instruction is an identity copy.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1308

bool isImplicitDef() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1258

bool isIndirectBranch(
    llvm::MachineInstr::QueryType Type =
        AnyInBundle) const

Description

Return true if this is an indirect branch, such as a branch through a register.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:865

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isIndirectDebugValue() const

Description

A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1233

bool isInlineAsm() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1259

bool isInsertSubreg() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1273

bool isInsertSubregLike(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions. E.g., on ARM, dX = VSETLNi32 dY, rZ, Imm is equivalent to a INSERT_SUBREG: dX = INSERT_SUBREG dY, rZ, translateImmToSubIdx(Imm) Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getInsertSubregLikeInputs has to be override accordingly.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:998

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isInsideBundle() const

Description

Return true if MI is in a bundle (but not the first MI in a bundle). A bundle looks like this before it's finalized: ---------------- | MI | ---------------- | ---------------- | MI * | ---------------- | ---------------- | MI * | ---------------- In this case, the first MI starts a bundle but is not inside a bundle, the next 2 MIs are considered "inside" the bundle. After a bundle is finalized, it looks like this: ---------------- | Bundle | ---------------- | ---------------- | MI * | ---------------- | ---------------- | MI * | ---------------- | ---------------- | MI * | ---------------- The first instruction has the special opcode "BUNDLE". It's not "inside" a bundle, but the next three MIs are.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:387

bool isKill() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1257

bool isLabel() const

Description

Returns true if the MachineInstr represents a label.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1193

bool isLoadFoldBarrier() const

Description

Returns true if it is illegal to fold a load across this instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1636

bool isMSInlineAsm() const

Description

FIXME: Seems like a layering violation that the AsmDialect, which is X86 specific, be attached to a generic MachineInstr.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1266

bool isMetaInstruction(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this instruction doesn't produce any output in the form of executable instructions.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:813

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isMoveImmediate(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this instruction is a move immediate (including conditional moves) instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:902

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isMoveReg(llvm::MachineInstr::QueryType
                   Type = IgnoreBundle) const

Description

Return true if this instruction is a register move. (including moving values from subreg to reg)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:908

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isNonListDebugValue() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1208

bool isNotDuplicable(llvm::MachineInstr::QueryType
                         Type = AnyInBundle) const

Description

Return true if this instruction cannot be safely duplicated. For example, if the instruction has a unique labels attached to it, duplicating it would cause multiple definition errors.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:925

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isOperandSubregIdx(unsigned int OpIdx) const

Description

Return true if operand \p OpIdx is a subregister index.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:587

Parameters

unsigned int OpIdx

bool isPHI() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1253

bool isPosition() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1206

bool isPreISelOpcode(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this is an instruction that should go through the usual legalization steps.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:787

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isPredicable(llvm::MachineInstr::QueryType
                      Type = AllInBundle) const

Description

Return true if this instruction has a predicate operand that controls execution. It may be set to 'always', or may be set to other values. There are various methods in TargetInstrInfo that can be used to control and modify the predicate in this instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:889

Parameters

llvm::MachineInstr::QueryType Type = AllInBundle

bool isPseudo(llvm::MachineInstr::QueryType Type =
                  IgnoreBundle) const

Description

Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:807

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isPseudoProbe() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1201

bool isRegSequence() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1281

bool isRegSequenceLike(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions. E.g., on ARM, dX VMOVDRR rY, rZ is equivalent to dX = REG_SEQUENCE rY, ssub_0, rZ, ssub_1. Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getRegSequenceLikeInputs has to be override accordingly.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:969

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isRegTiedToDefOperand(
    unsigned int UseOpIdx,
    unsigned int* DefOpIdx = nullptr) const

Description

Return true if the use operand of the specified index is tied to a def operand. It also returns the def operand index by reference if DefOpIdx is not null.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1532

Parameters

unsigned int UseOpIdx
unsigned int* DefOpIdx = nullptr

bool isRegTiedToUseOperand(
    unsigned int DefOpIdx,
    unsigned int* UseOpIdx = nullptr) const

Description

Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints. Returns the first tied use operand index by reference if UseOpIdx is not null.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1519

Parameters

unsigned int DefOpIdx
unsigned int* UseOpIdx = nullptr

bool isRematerializable(
    llvm::MachineInstr::QueryType Type =
        AllInBundle) const

Description

Returns true if this instruction is a candidate for remat. This flag is deprecated, please don't use it anymore. If this flag is set, the isReallyTriviallyReMaterializable() method is called to verify the instruction is really rematable.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1107

Parameters

llvm::MachineInstr::QueryType Type = AllInBundle

bool isReturn(llvm::MachineInstr::QueryType Type =
                  AnyInBundle) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:817

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isSafeToMove(llvm::AAResults* AA,
                  bool& SawStore) const

Description

Return true if it is safe to move this instruction. If SawStore is set to true, it means that there is a store (or call) between the instruction's location and its intended destination.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1593

Parameters

llvm::AAResults* AA
bool& SawStore

bool isSelect(llvm::MachineInstr::QueryType Type =
                  IgnoreBundle) const

Description

Return true if this instruction is a select instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:918

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool isStackAligningInlineAsm() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1270

bool isSubregToReg() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1277

bool isTerminator(llvm::MachineInstr::QueryType
                      Type = AnyInBundle) const

Description

Returns true if this instruction part of the terminator for a basic block. Typically this is things like return and branch instructions. Various passes use this to insert code into the bottom of a basic block, but before control flow occurs.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:851

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isTransient() const

Description

Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1316

bool isUnconditionalBranch(
    llvm::MachineInstr::QueryType Type =
        AnyInBundle) const

Description

Return true if this is a branch which always transfers control flow to some other block. The TargetInstrInfo::analyzeBranch method can be used to get more information about this branch.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:881

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool isUndefDebugValue() const

Description

Return true if the instruction is a debug value which describes a part of a variable as unavailable.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1243

bool isVariadic(llvm::MachineInstr::QueryType
                    Type = IgnoreBundle) const

Description

Return true if this instruction can have a variable number of operands. In this case, the variable operands will be after the normal operands but before the implicit definitions and uses (if any are present).

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:795

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

bool killsRegister(llvm::Register Reg,
                   const llvm::TargetRegisterInfo*
                       TRI = nullptr) const

Description

Return true if the MachineInstr kills the specified register. If TargetRegisterInfo is passed, then it also checks if there is a kill of a super-register.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1364

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* TRI = nullptr

bool mayAlias(llvm::AAResults* AA,
              const llvm::MachineInstr& Other,
              bool UseTBAA) const

Description

Assumes any physical registers used to compute addresses have the same value for both instructions. Returns false if neither instruction writes to memory.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1605

Parameters

llvm::AAResults* AA
Optional alias analysis, used to compare memory operands.
const llvm::MachineInstr& Other
MachineInstr to check aliasing against.
bool UseTBAA
Whether to pass TBAA information to alias analysis.

bool mayLoad(llvm::MachineInstr::QueryType Type =
                 AnyInBundle) const

Description

Return true if this instruction could possibly read memory. Instructions with this flag set are not necessarily simple load instructions, they may load a value and modify it, for example.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1009

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool mayLoadOrStore(llvm::MachineInstr::QueryType
                        Type = AnyInBundle) const

Description

Return true if this instruction could possibly read or modify memory.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1032

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

bool mayRaiseFPException() const

Description

Return true if this instruction could possibly raise a floating-point exception. This is the case if the instruction is a floating-point instruction that can in principle raise an exception, as indicated by the MCID::MayRaiseFPException property, *and* at the same time, the instruction is used in a context where we expect floating-point exceptions are not disabled, as indicated by the NoFPExcept MI flag.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1042

bool mayStore(llvm::MachineInstr::QueryType Type =
                  AnyInBundle) const

Description

Return true if this instruction could possibly modify memory. Instructions with this flag set are not necessarily simple store instructions, they may store a modified value based on their operands, or may not actually modify anything, for example.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1022

Parameters

llvm::MachineInstr::QueryType Type = AnyInBundle

ArrayRef<llvm::MachineMemOperand*> memoperands()
    const

Description

Access to memory operands of the instruction. If there are none, that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:688

llvm::MachineInstr::mmo_iterator
memoperands_begin() const

Description

Access to memory operands of the instruction. If `memoperands_begin() == memoperands_end()`, that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:706

bool memoperands_empty() const

Description

Return true if we don't have any memory operands which described the memory access done by this instruction. If this is true, calling code must be conservative.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:718

llvm::MachineInstr::mmo_iterator memoperands_end()
    const

Description

Access to memory operands of the instruction. If `memoperands_begin() == memoperands_end()`, that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:713

uint16_t mergeFlagsWith(
    const llvm::MachineInstr& Other) const

Description

Return the MIFlags which represent both MachineInstrs. This should be used when merging two MachineInstrs into one. This routine does not modify the MIFlags of this MachineInstr.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1792

Parameters

const llvm::MachineInstr& Other

bool modifiesRegister(
    llvm::Register Reg,
    const llvm::TargetRegisterInfo* TRI =
        nullptr) const

Description

Return true if the MachineInstr modifies (fully define or partially define) the specified register. NOTE: It's ignoring subreg indices on virtual registers.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1381

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* TRI = nullptr

void moveBefore(llvm::MachineInstr* MovePos)

Description

Move the instruction before \p MovePos.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:292

Parameters

llvm::MachineInstr* MovePos

iterator_range<llvm::MachineInstr::mop_iterator>
operands()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:616

iterator_range<
    llvm::MachineInstr::const_mop_iterator>
operands() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:619

llvm::MachineInstr::mop_iterator operands_begin()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:610

llvm::MachineInstr::const_mop_iterator
operands_begin() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:613

llvm::MachineInstr::const_mop_iterator
operands_end() const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:614

llvm::MachineInstr::mop_iterator operands_end()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:611

unsigned int peekDebugInstrNum() const

Description

Examine the instruction number of this MachineInstr. May be zero if it hasn't been assigned a number yet.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:467

void print(llvm::raw_ostream& OS,
           bool IsStandalone = true,
           bool SkipOpers = false,
           bool SkipDebugLoc = false,
           bool AddNewLine = true,
           const llvm::TargetInstrInfo* TII =
               nullptr) const

Description

Print this MI to \p OS. Don't print information that can be inferred from other instructions if\p IsStandalone is false. It is usually true when only a fragment of the function is printed. Only print the defs and the opcode if \p SkipOpers is true. Otherwise, also print operands if \p SkipDebugLoc is true. Otherwise, also print the debug loc, with a terminating newline.\p TII is used to print the opcode name. If it's not present, but the MI is in a function, the opcode will be printed using the function's TII.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1678

Parameters

llvm::raw_ostream& OS
bool IsStandalone = true
bool SkipOpers = false
bool SkipDebugLoc = false
bool AddNewLine = true
const llvm::TargetInstrInfo* TII = nullptr

void print(llvm::raw_ostream& OS,
           llvm::ModuleSlotTracker& MST,
           bool IsStandalone = true,
           bool SkipOpers = false,
           bool SkipDebugLoc = false,
           bool AddNewLine = true,
           const llvm::TargetInstrInfo* TII =
               nullptr) const

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1681

Parameters

llvm::raw_ostream& OS
llvm::ModuleSlotTracker& MST
bool IsStandalone = true
bool SkipOpers = false
bool SkipDebugLoc = false
bool AddNewLine = true
const llvm::TargetInstrInfo* TII = nullptr

bool readsRegister(llvm::Register Reg,
                   const llvm::TargetRegisterInfo*
                       TRI = nullptr) const

Description

Return true if the MachineInstr reads the specified register. If TargetRegisterInfo is passed, then it also checks if there is a read of a super-register. This does not count partial redefines of virtual registers as reads: %reg1024:6 = OP.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1343

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* TRI = nullptr

bool readsVirtualRegister(
    llvm::Register Reg) const

Description

Return true if the MachineInstr reads the specified virtual register. Take into account that a partial define is a read-modify-write operation.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1351

Parameters

llvm::Register Reg

std::pair<bool, bool> readsWritesVirtualRegister(
    llvm::Register Reg,
    SmallVectorImpl<unsigned int>* Ops =
        nullptr) const

Description

Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg. This also considers partial defines. If Ops is not null, all operand indices for Reg are added.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1358

Parameters

llvm::Register Reg
SmallVectorImpl<unsigned int>* Ops = nullptr

bool registerDefIsDead(
    llvm::Register Reg,
    const llvm::TargetRegisterInfo* TRI =
        nullptr) const

Description

Returns true if the register is dead in this machine instruction. If TargetRegisterInfo is passed, then it also checks if there is a dead def of a super-register.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1389

Parameters

llvm::Register Reg
const llvm::TargetRegisterInfo* TRI = nullptr

llvm::MachineInstr* removeFromBundle()

Description

Unlink this instruction from its basic block and return it without deleting it. If the instruction is part of a bundle, the other instructions in the bundle remain bundled.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1171

llvm::MachineInstr* removeFromParent()

Description

Unlink 'this' from the containing basic block, and return it without deleting it. This function can not be used on bundled instructions, use removeFromBundle() to remove individual instructions from a bundle.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1164

void removeOperand(unsigned int OpNo)

Description

Erase an operand from an instruction, leaving it with one fewer operand than it started with.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1727

Parameters

unsigned int OpNo

void removeRegOperandsFromUseLists(
    llvm::MachineRegisterInfo&)

Description

Unlink all of the register operands in this instruction from their respective use lists. This requires that the operands already be on their use lists.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1846

Parameters

llvm::MachineRegisterInfo& 

void setAsmPrinterFlag(uint8_t Flag)

Description

Set a flag for the AsmPrinter.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:317

Parameters

uint8_t Flag

void setDebugInstrNum(unsigned int Num)

Description

Set instruction number of this MachineInstr. Avoid using unless you're deserializing this information.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:471

Parameters

unsigned int Num

void setDebugLoc(llvm::DebugLoc DL)

Description

Replace current source information with new such. Avoid using this, the constructor argument is preferable.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1720

Parameters

llvm::DebugLoc DL

void setDebugValueUndef()

Description

Sets all register debug operands in this debug value instruction to be undef.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1827

void setDesc(const llvm::MCInstrDesc& TID)

Description

Replace the instruction descriptor (thus opcode) of the current instruction with a new one.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1716

Parameters

const llvm::MCInstrDesc& TID

void setExtraInfo(
    llvm::MachineFunction& MF,
    ArrayRef<llvm::MachineMemOperand*> MMOs,
    llvm::MCSymbol* PreInstrSymbol,
    llvm::MCSymbol* PostInstrSymbol,
    llvm::MDNode* HeapAllocMarker)

Description

Stores extra instruction information inline or allocates as ExtraInfo based on the number of pointers.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1865

Parameters

llvm::MachineFunction& MF
ArrayRef<llvm::MachineMemOperand*> MMOs
llvm::MCSymbol* PreInstrSymbol
llvm::MCSymbol* PostInstrSymbol
llvm::MDNode* HeapAllocMarker

void setFlag(llvm::MachineInstr::MIFlag Flag)

Description

Set a MI flag.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:337

Parameters

llvm::MachineInstr::MIFlag Flag

void setFlags(unsigned int flags)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:341

Parameters

unsigned int flags

void setHeapAllocMarker(llvm::MachineFunction& MF,
                        llvm::MDNode* MD)

Description

Set a marker on instructions that denotes where we should create and emit heap alloc site labels. This waits until after instruction selection and optimizations to create the label, so it should still work if the instruction is removed or duplicated.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1787

Parameters

llvm::MachineFunction& MF
llvm::MDNode* MD

void setMemRefs(
    llvm::MachineFunction& MF,
    ArrayRef<llvm::MachineMemOperand*> MemRefs)

Description

Assign this MachineInstr's memory reference descriptor list. Unlike other methods, this *will* allocate them into a new array associated with the provided `MachineFunction`.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1739

Parameters

llvm::MachineFunction& MF
ArrayRef<llvm::MachineMemOperand*> MemRefs

void setParent(llvm::MachineBasicBlock* P)

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:263

Parameters

llvm::MachineBasicBlock* P

void setPhysRegsDeadExcept(
    ArrayRef<llvm::Register> UsedRegs,
    const llvm::TargetRegisterInfo& TRI)

Description

Mark every physreg used by this instruction as dead except those in the UsedRegs list. On instructions with register mask operands, also add implicit-def operands for all registers in UsedRegs.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1587

Parameters

ArrayRef<llvm::Register> UsedRegs
const llvm::TargetRegisterInfo& TRI

void setPostInstrSymbol(llvm::MachineFunction& MF,
                        llvm::MCSymbol* Symbol)

Description

Set a symbol that will be emitted just after the instruction itself. Setting this to a null pointer will remove any such symbol. FIXME: This is not fully implemented yet.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1777

Parameters

llvm::MachineFunction& MF
llvm::MCSymbol* Symbol

void setPreInstrSymbol(llvm::MachineFunction& MF,
                       llvm::MCSymbol* Symbol)

Description

Set a symbol that will be emitted just prior to the instruction itself. Setting this to a null pointer will remove any such symbol. FIXME: This is not fully implemented yet.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1770

Parameters

llvm::MachineFunction& MF
llvm::MCSymbol* Symbol

void setRegisterDefReadUndef(llvm::Register Reg,
                             bool IsUndef = true)

Description

Mark all subregister defs of register @p Reg with the undef flag. This function is used when we determined to have a subregister def in an otherwise undefined super register.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1575

Parameters

llvm::Register Reg
bool IsUndef = true

bool shouldUpdateCallSiteInfo() const

Description

Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see \ref copyCallSiteInfo, \ref moveCallSiteInfo, \ref eraseCallSiteInfo).

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:837

void substituteRegister(
    llvm::Register FromReg,
    llvm::Register ToReg,
    unsigned int SubIdx,
    const llvm::TargetRegisterInfo& RegInfo)

Description

Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1547

Parameters

llvm::Register FromReg
llvm::Register ToReg
unsigned int SubIdx
const llvm::TargetRegisterInfo& RegInfo

void tieOperands(unsigned int DefIdx,
                 unsigned int UseIdx)

Description

Add a tie between the register operands at DefIdx and UseIdx. The tie will cause the register allocator to ensure that the two operands are assigned the same physical register. Tied operands are managed automatically for explicit operands in the MCInstrDesc. This method is for exceptional cases like inline asm.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1508

Parameters

unsigned int DefIdx
unsigned int UseIdx

void unbundleFromPred()

Description

Break bundle above this instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:414

void unbundleFromSucc()

Description

Break bundle below this instruction.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:417

void untieRegOperand(unsigned int OpIdx)

Description

Break any tie involving OpIdx.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1800

Parameters

unsigned int OpIdx

iterator_range<
    llvm::MachineInstr::const_mop_iterator>
uses() const

Description

\copydoc uses()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:668

iterator_range<llvm::MachineInstr::mop_iterator>
uses()

Description

Returns a range that includes all operands that are register uses. This may include unrelated operands which are not register uses.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:664

bool usesCustomInsertionHook(
    llvm::MachineInstr::QueryType Type =
        IgnoreBundle) const

Description

Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block. If this is true for the instruction, it basically means that it is a pseudo instruction used at SelectionDAG time that is expanded out into magic code by the target when MachineInstrs are formed. If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock method is used to insert this into the MachineBasicBlock.

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:1091

Parameters

llvm::MachineInstr::QueryType Type = IgnoreBundle

~MachineInstr()

Declared at: llvm/include/llvm/CodeGen/MachineInstr.h:286