class LegalizerHelper

Declaration

class LegalizerHelper { /* full declaration omitted */ };

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:46

Member Variables

public llvm::MachineIRBuilder& MIRBuilder

Expose MIRBuilder so clients can set their own RecordInsertInstruction functions

public llvm::GISelChangeObserver& Observer

To keep track of changes made by the LegalizerHelper.

private llvm::MachineRegisterInfo& MRI

private const llvm::LegalizerInfo& LI

private const llvm::TargetLowering& TLI

Method Overview

• public LegalizerHelper(llvm::MachineFunction & MF, llvm::GISelChangeObserver & Observer, llvm::MachineIRBuilder & B)
• public LegalizerHelper(llvm::MachineFunction & MF, const llvm::LegalizerInfo & LI, llvm::GISelChangeObserver & Observer, llvm::MachineIRBuilder & B)
• private void appendVectorElts(SmallVectorImpl<llvm::Register> & Elts, llvm::Register Reg)
• public llvm::LegalizerHelper::LegalizeResult bitcast(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public void bitcastDst(llvm::MachineInstr & MI, llvm::LLT CastTy, unsigned int OpIdx)
• public llvm::LegalizerHelper::LegalizeResult bitcastExtractVectorElt(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT CastTy)
• public llvm::LegalizerHelper::LegalizeResult bitcastInsertVectorElt(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT CastTy)
• public void bitcastSrc(llvm::MachineInstr & MI, llvm::LLT CastTy, unsigned int OpIdx)
• private llvm::LLT buildLCMMergePieces(llvm::LLT DstTy, llvm::LLT NarrowTy, llvm::LLT GCDTy, SmallVectorImpl<llvm::Register> & VRegs, unsigned int PadStrategy = TargetOpcode::G_ANYEXT)
• private void buildWidenedRemergeToDst(llvm::Register DstReg, llvm::LLT LCMTy, ArrayRef<llvm::Register> RemergeRegs)
• private void changeOpcode(llvm::MachineInstr & MI, unsigned int NewOpcode)
• public llvm::Register coerceToScalar(llvm::Register Val)
• public llvm::MachineInstrBuilder createStackTemporary(llvm::TypeSize Bytes, llvm::Align Alignment, llvm::MachinePointerInfo & PtrInfo)
• private llvm::LLT extractGCDType(SmallVectorImpl<llvm::Register> & Parts, llvm::LLT DstTy, llvm::LLT NarrowTy, llvm::Register SrcReg)
• private void extractGCDType(SmallVectorImpl<llvm::Register> & Parts, llvm::LLT GCDTy, llvm::Register SrcReg)
• private bool extractParts(llvm::Register Reg, llvm::LLT RegTy, llvm::LLT MainTy, llvm::LLT & LeftoverTy, SmallVectorImpl<llvm::Register> & VRegs, SmallVectorImpl<llvm::Register> & LeftoverVRegs)
• private void extractParts(llvm::Register Reg, llvm::LLT Ty, int NumParts, SmallVectorImpl<llvm::Register> & VRegs)
• private void extractVectorParts(llvm::Register Reg, unsigned int NumElst, SmallVectorImpl<llvm::Register> & VRegs)
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVector(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVectorExtractInsertVectorElt(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVectorMerge(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVectorMultiEltType(llvm::GenericMachineInstr & MI, unsigned int NumElts, std::initializer_list<unsigned int> NonVecOpIndices = {})
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVectorPhi(llvm::GenericMachineInstr & MI, unsigned int NumElts)
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVectorReductions(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVectorShuffle(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult fewerElementsVectorUnmergeValues(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public const llvm::LegalizerInfo & getLegalizerInfo() const
• public llvm::Align getStackTemporaryAlignment(llvm::LLT Type, llvm::Align MinAlign = llvm::Align()) const
• public const llvm::TargetLowering & getTargetLowering() const
• public llvm::Register getVectorElementPointer(llvm::Register VecPtr, llvm::LLT VecTy, llvm::Register Index)
• private void insertParts(llvm::Register DstReg, llvm::LLT ResultTy, llvm::LLT PartTy, ArrayRef<llvm::Register> PartRegs, llvm::LLT LeftoverTy = llvm::LLT(), ArrayRef<llvm::Register> LeftoverRegs = {})
• public llvm::LegalizerHelper::LegalizeResult legalizeInstrStep(llvm::MachineInstr & MI, llvm::LostDebugLocObserver & LocObserver)
• public llvm::LegalizerHelper::LegalizeResult libcall(llvm::MachineInstr & MI, llvm::LostDebugLocObserver & LocObserver)
• public llvm::LegalizerHelper::LegalizeResult lower(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult lowerAbsToAddXor(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerAbsToMaxNeg(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerAddSubSatToAddoSubo(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerAddSubSatToMinMax(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerBitCount(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerBitcast(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerBitreverse(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerBswap(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerDIVREM(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerDynStackAlloc(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerExtract(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerExtractInsertVectorElt(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFCopySign(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFFloor(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFMad(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFMinNumMaxNum(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFPOWI(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFPTOSI(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFPTOUI(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFPTRUNC(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFPTRUNC_F64_TO_F16(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFunnelShift(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFunnelShiftAsShifts(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerFunnelShiftWithInverse(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerInsert(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerIntrinsicRound(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerLoad(llvm::GAnyLoad & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerMemCpyFamily(llvm::MachineInstr & MI, unsigned int MaxLen = 0)
• private llvm::LegalizerHelper::LegalizeResult lowerMemcpy(llvm::MachineInstr & MI, llvm::Register Dst, llvm::Register Src, uint64_t KnownLen, uint64_t Limit, llvm::Align DstAlign, llvm::Align SrcAlign, bool IsVolatile)
• public llvm::LegalizerHelper::LegalizeResult lowerMemcpyInline(llvm::MachineInstr & MI)
• private llvm::LegalizerHelper::LegalizeResult lowerMemcpyInline(llvm::MachineInstr & MI, llvm::Register Dst, llvm::Register Src, uint64_t KnownLen, llvm::Align DstAlign, llvm::Align SrcAlign, bool IsVolatile)
• private llvm::LegalizerHelper::LegalizeResult lowerMemmove(llvm::MachineInstr & MI, llvm::Register Dst, llvm::Register Src, uint64_t KnownLen, llvm::Align DstAlign, llvm::Align SrcAlign, bool IsVolatile)
• private llvm::LegalizerHelper::LegalizeResult lowerMemset(llvm::MachineInstr & MI, llvm::Register Dst, llvm::Register Val, uint64_t KnownLen, llvm::Align Alignment, bool IsVolatile)
• public llvm::LegalizerHelper::LegalizeResult lowerMergeValues(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerMinMax(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerReadWriteRegister(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerRotate(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerRotateWithReverseRotate(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerSADDO_SSUBO(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerSITOFP(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerSMULH_UMULH(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerSelect(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerShlSat(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerShuffleVector(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerStore(llvm::GStore & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerU64ToF32BitOps(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerUITOFP(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerUnmergeValues(llvm::MachineInstr & MI)
• public llvm::LegalizerHelper::LegalizeResult lowerVectorReduction(llvm::MachineInstr & MI)
• private void mergeMixedSubvectors(llvm::Register DstReg, ArrayRef<llvm::Register> PartRegs)
• public llvm::LegalizerHelper::LegalizeResult moreElementsVector(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT MoreTy)
• public void moreElementsVectorDst(llvm::MachineInstr & MI, llvm::LLT MoreTy, unsigned int OpIdx)
• public llvm::LegalizerHelper::LegalizeResult moreElementsVectorPhi(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT MoreTy)
• public llvm::LegalizerHelper::LegalizeResult moreElementsVectorShuffle(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT MoreTy)
• public void moreElementsVectorSrc(llvm::MachineInstr & MI, llvm::LLT MoreTy, unsigned int OpIdx)
• private void multiplyRegisters(SmallVectorImpl<llvm::Register> & DstRegs, ArrayRef<llvm::Register> Src1Regs, ArrayRef<llvm::Register> Src2Regs, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult narrowScalar(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarAddSub(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarBasic(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarCTLZ(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarCTPOP(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarCTTZ(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public void narrowScalarDst(llvm::MachineInstr & MI, llvm::LLT NarrowTy, unsigned int OpIdx, unsigned int ExtOpcode)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarExt(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarExtract(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarFPTOI(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarInsert(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarMul(llvm::MachineInstr & MI, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarSelect(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarShift(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT Ty)
• public llvm::LegalizerHelper::LegalizeResult narrowScalarShiftByConstant(llvm::MachineInstr & MI, const llvm::APInt & Amt, llvm::LLT HalfTy, llvm::LLT ShiftAmtTy)
• public void narrowScalarSrc(llvm::MachineInstr & MI, llvm::LLT NarrowTy, unsigned int OpIdx)
• public llvm::LegalizerHelper::LegalizeResult reduceLoadStoreWidth(llvm::GLoadStore & MI, unsigned int TypeIdx, llvm::LLT NarrowTy)
• private llvm::LegalizerHelper::LegalizeResult tryNarrowPow2Reduction(llvm::MachineInstr & MI, llvm::Register SrcReg, llvm::LLT SrcTy, llvm::LLT NarrowTy, unsigned int ScalarOpc)
• public llvm::LegalizerHelper::LegalizeResult widenScalar(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)
• private llvm::LegalizerHelper::LegalizeResult widenScalarAddSubOverflow(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)
• private llvm::LegalizerHelper::LegalizeResult widenScalarAddSubShlSat(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)
• public void widenScalarDst(llvm::MachineInstr & MI, llvm::LLT WideTy, unsigned int OpIdx = 0, unsigned int TruncOpcode = TargetOpcode::G_TRUNC)
• private llvm::LegalizerHelper::LegalizeResult widenScalarExtract(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)
• private llvm::LegalizerHelper::LegalizeResult widenScalarInsert(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)
• private llvm::LegalizerHelper::LegalizeResult widenScalarMergeValues(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)
• private llvm::LegalizerHelper::LegalizeResult widenScalarMulo(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)
• public void widenScalarSrc(llvm::MachineInstr & MI, llvm::LLT WideTy, unsigned int OpIdx, unsigned int ExtOpcode)
• private llvm::LegalizerHelper::LegalizeResult widenScalarUnmergeValues(llvm::MachineInstr & MI, unsigned int TypeIdx, llvm::LLT WideTy)

Methods

¶LegalizerHelper(
    llvm::MachineFunction& MF,
    llvm::GISelChangeObserver& Observer,
    llvm::MachineIRBuilder& B)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:78

Parameters

llvm::MachineFunction& MF

llvm::GISelChangeObserver& Observer

llvm::MachineIRBuilder& B

¶LegalizerHelper(
    llvm::MachineFunction& MF,
    const llvm::LegalizerInfo& LI,
    llvm::GISelChangeObserver& Observer,
    llvm::MachineIRBuilder& B)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:80

Parameters

llvm::MachineFunction& MF

const llvm::LegalizerInfo& LI

llvm::GISelChangeObserver& Observer

llvm::MachineIRBuilder& B

¶void appendVectorElts(
    SmallVectorImpl<llvm::Register>& Elts,
    llvm::Register Reg)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:218

Parameters

SmallVectorImpl<llvm::Register>& Elts

llvm::Register Reg

¶llvm::LegalizerHelper::LegalizeResult bitcast(
    llvm::MachineInstr& MI,
    unsigned int TypeIdx,
    llvm::LLT Ty)

Description

Legalize an instruction by replacing the value type

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:106

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶void bitcastDst(llvm::MachineInstr& MI,
                llvm::LLT CastTy,
                unsigned int OpIdx)

Description

Legalize a single operand \p OpIdx of the machine instruction \p MI as a def by inserting a G_BITCAST from \p CastTy

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:168

Parameters

llvm::MachineInstr& MI

llvm::LLT CastTy

unsigned int OpIdx

¶llvm::LegalizerHelper::LegalizeResult
bitcastExtractVectorElt(llvm::MachineInstr& MI,
                        unsigned int TypeIdx,
                        llvm::LLT CastTy)

Description

Perform Bitcast legalize action on G_EXTRACT_VECTOR_ELT.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:355

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT CastTy

¶llvm::LegalizerHelper::LegalizeResult
bitcastInsertVectorElt(llvm::MachineInstr& MI,
                       unsigned int TypeIdx,
                       llvm::LLT CastTy)

Description

Perform Bitcast legalize action on G_INSERT_VECTOR_ELT.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:359

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT CastTy

¶void bitcastSrc(llvm::MachineInstr& MI,
                llvm::LLT CastTy,
                unsigned int OpIdx)

Description

Legalize a single operand \p OpIdx of the machine instruction \p MI as a use by inserting a G_BITCAST to \p CastTy

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:164

Parameters

llvm::MachineInstr& MI

llvm::LLT CastTy

unsigned int OpIdx

¶llvm::LLT buildLCMMergePieces(
    llvm::LLT DstTy,
    llvm::LLT NarrowTy,
    llvm::LLT GCDTy,
    SmallVectorImpl<llvm::Register>& VRegs,
    unsigned int PadStrategy =
        TargetOpcode::G_ANYEXT)

Description

Produce a merge of values in \p VRegs to define \p DstReg. Perform a merge from the least common multiple type, and convert as appropriate to \p DstReg. \p VRegs should each have type \p GCDTy. This type should be greatest common divisor type of \p DstReg, \p NarrowTy, and an undetermined source type. \p NarrowTy is the desired result merge source type. If the source value needs to be widened to evenly cover \p DstReg, inserts high bits corresponding to the extension opcode \p PadStrategy. \p VRegs will be cleared, and the the result \p NarrowTy register pieces will replace it. Returns The complete LCMTy that \p VRegs will cover when merged.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:248

Parameters

llvm::LLT DstTy

llvm::LLT NarrowTy

llvm::LLT GCDTy

SmallVectorImpl<llvm::Register>& VRegs

unsigned int PadStrategy = TargetOpcode::G_ANYEXT

¶void buildWidenedRemergeToDst(
    llvm::Register DstReg,
    llvm::LLT LCMTy,
    ArrayRef<llvm::Register> RemergeRegs)

Description

Merge the values in \p RemergeRegs to an \p LCMTy typed value. Extract the low bits into \p DstReg. This is intended to use the outputs from buildLCMMergePieces after processing.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:255

Parameters

llvm::Register DstReg

llvm::LLT LCMTy

ArrayRef<llvm::Register> RemergeRegs

¶void changeOpcode(llvm::MachineInstr& MI,
                  unsigned int NewOpcode)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:265

Parameters

llvm::MachineInstr& MI

unsigned int NewOpcode

¶llvm::Register coerceToScalar(llvm::Register Val)

Description

Cast the given value to an LLT::scalar with an equivalent size. Returns the register to use if an instruction was inserted. Returns the original register if no coercion was necessary.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:127

Parameters

llvm::Register Val

¶llvm::MachineInstrBuilder createStackTemporary(
    llvm::TypeSize Bytes,
    llvm::Align Alignment,
    llvm::MachinePointerInfo& PtrInfo)

Description

Create a stack temporary based on the size in bytes and the alignment

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:291

Parameters

llvm::TypeSize Bytes

llvm::Align Alignment

llvm::MachinePointerInfo& PtrInfo

¶llvm::LLT extractGCDType(
    SmallVectorImpl<llvm::Register>& Parts,
    llvm::LLT DstTy,
    llvm::LLT NarrowTy,
    llvm::Register SrcReg)

Description

Unmerge \p SrcReg into smaller sized values, and append them to \p Parts. The elements of \p Parts will be the greatest common divisor type of \p DstTy, \p NarrowTy and the type of \p SrcReg. This will compute and return the GCD type.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:224

Parameters

SmallVectorImpl<llvm::Register>& Parts

llvm::LLT DstTy

llvm::LLT NarrowTy

llvm::Register SrcReg

¶void extractGCDType(
    SmallVectorImpl<llvm::Register>& Parts,
    llvm::LLT GCDTy,
    llvm::Register SrcReg)

Description

Unmerge \p SrcReg into \p GCDTy typed registers. This will append all of the unpacked registers to \p Parts. This version is if the common unmerge type is already known.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:230

Parameters

SmallVectorImpl<llvm::Register>& Parts

llvm::LLT GCDTy

llvm::Register SrcReg

¶bool extractParts(
    llvm::Register Reg,
    llvm::LLT RegTy,
    llvm::LLT MainTy,
    llvm::LLT& LeftoverTy,
    SmallVectorImpl<llvm::Register>& VRegs,
    SmallVectorImpl<llvm::Register>&
        LeftoverVRegs)

Description

Version which handles irregular splits.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:193

Parameters

llvm::Register Reg

llvm::LLT RegTy

llvm::LLT MainTy

llvm::LLT& LeftoverTy

SmallVectorImpl<llvm::Register>& VRegs

SmallVectorImpl<llvm::Register>& LeftoverVRegs

¶void extractParts(
    llvm::Register Reg,
    llvm::LLT Ty,
    int NumParts,
    SmallVectorImpl<llvm::Register>& VRegs)

Description

Helper function to split a wide generic register into bitwise blocks with the given Type (which implies the number of blocks needed). The generic registers created are appended to Ops, starting at bit 0 of Reg.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:189

Parameters

llvm::Register Reg

llvm::LLT Ty

int NumParts

SmallVectorImpl<llvm::Register>& VRegs

¶void extractVectorParts(
    llvm::Register Reg,
    unsigned int NumElst,
    SmallVectorImpl<llvm::Register>& VRegs)

Description

Version which handles irregular sub-vector splits.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:199

Parameters

llvm::Register Reg

unsigned int NumElst

SmallVectorImpl<llvm::Register>& VRegs

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVector(llvm::MachineInstr& MI,
                    unsigned int TypeIdx,
                    llvm::LLT NarrowTy)

Description

Legalize a vector instruction by splitting into multiple components, each acting on the same scalar type as the original but with fewer elements.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:114

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVectorExtractInsertVectorElt(
    llvm::MachineInstr& MI,
    unsigned int TypeIdx,
    llvm::LLT NarrowTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:323

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVectorMerge(llvm::MachineInstr& MI,
                         unsigned int TypeIdx,
                         llvm::LLT NarrowTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:321

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVectorMultiEltType(
    llvm::GenericMachineInstr& MI,
    unsigned int NumElts,
    std::initializer_list<unsigned int>
        NonVecOpIndices = {})

Description

Handles most opcodes. Split \p MI into same instruction on sub-vectors or scalars with \p NumElts elements (1 for scalar). Supports uneven splits: there can be leftover sub-vector with fewer then \p NumElts or a leftover scalar. To avoid this use moreElements first and set MI number of elements to multiple of \p NumElts. Non-vector operands that should be used on all sub-instructions without split are listed in \p NonVecOpIndices.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:306

Parameters

llvm::GenericMachineInstr& MI

unsigned int NumElts

std::initializer_list<unsigned int> NonVecOpIndices = {}

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVectorPhi(
    llvm::GenericMachineInstr& MI,
    unsigned int NumElts)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:310

Parameters

llvm::GenericMachineInstr& MI

unsigned int NumElts

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVectorReductions(
    llvm::MachineInstr& MI,
    unsigned int TypeIdx,
    llvm::LLT NarrowTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:333

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVectorShuffle(llvm::MachineInstr& MI,
                           unsigned int TypeIdx,
                           llvm::LLT NarrowTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:336

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
fewerElementsVectorUnmergeValues(
    llvm::MachineInstr& MI,
    unsigned int TypeIdx,
    llvm::LLT NarrowTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:318

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶const llvm::LegalizerInfo& getLegalizerInfo()
    const

Description

Expose LegalizerInfo so the clients can re-use.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:75

¶llvm::Align getStackTemporaryAlignment(
    llvm::LLT Type,
    llvm::Align MinAlign = llvm::Align()) const

Description

Return the alignment to use for a stack temporary object with the given type.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:288

Parameters

llvm::LLT Type

llvm::Align MinAlign = llvm::Align()

¶const llvm::TargetLowering& getTargetLowering()
    const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:76

¶llvm::Register getVectorElementPointer(
    llvm::Register VecPtr,
    llvm::LLT VecTy,
    llvm::Register Index)

Description

Get a pointer to vector element \p Index located in memory for a vector of type \p VecTy starting at a base address of \p VecPtr. If \p Index is out of bounds the returned pointer is unspecified, but will be within the vector bounds.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:298

Parameters

llvm::Register VecPtr

llvm::LLT VecTy

llvm::Register Index

¶void insertParts(
    llvm::Register DstReg,
    llvm::LLT ResultTy,
    llvm::LLT PartTy,
    ArrayRef<llvm::Register> PartRegs,
    llvm::LLT LeftoverTy = llvm::LLT(),
    ArrayRef<llvm::Register> LeftoverRegs = {})

Description

Helper function to build a wide generic register \p DstReg of type \p RegTy from smaller parts. This will produce a G_MERGE_VALUES, G_BUILD_VECTOR, G_CONCAT_VECTORS, or sequence of G_INSERT as appropriate for the types. \p PartRegs must be registers of type \p PartTy. If \p ResultTy does not evenly break into \p PartTy sized pieces, the remainder must be specified with \p LeftoverRegs of type \p LeftoverTy.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:211

Parameters

llvm::Register DstReg

llvm::LLT ResultTy

llvm::LLT PartTy

ArrayRef<llvm::Register> PartRegs

llvm::LLT LeftoverTy = llvm::LLT()

ArrayRef<llvm::Register> LeftoverRegs = {}

¶llvm::LegalizerHelper::LegalizeResult
legalizeInstrStep(
    llvm::MachineInstr& MI,
    llvm::LostDebugLocObserver& LocObserver)

Description

Replace \p MI by a sequence of legal instructions that can implement the same operation. Note that this means \p MI may be deleted, so any iterator steps should be performed before calling this function. \p Helper should be initialized to the MachineFunction containing \p MI. Considered as an opaque blob, the legal code will use and define the same registers as \p MI.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:90

Parameters

llvm::MachineInstr& MI

llvm::LostDebugLocObserver& LocObserver

¶llvm::LegalizerHelper::LegalizeResult libcall(
    llvm::MachineInstr& MI,
    llvm::LostDebugLocObserver& LocObserver)

Description

Legalize an instruction by emiting a runtime library call instead.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:94

Parameters

llvm::MachineInstr& MI

llvm::LostDebugLocObserver& LocObserver

¶llvm::LegalizerHelper::LegalizeResult lower(
    llvm::MachineInstr& MI,
    unsigned int TypeIdx,
    llvm::LLT Ty)

Description

Legalize an instruction by splitting it into simpler parts, hopefully understood by the target.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:110

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
lowerAbsToAddXor(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:405

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerAbsToMaxNeg(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:406

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerAddSubSatToAddoSubo(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:397

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerAddSubSatToMinMax(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:396

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerBitCount(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:365

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerBitcast(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:362

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerBitreverse(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:400

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerBswap(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:399

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerDIVREM(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:404

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerDynStackAlloc(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:392

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerExtract(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:393

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerExtractInsertVectorElt(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:390

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerFCopySign(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:383

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerFFloor(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:387

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerFMad(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:385

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerFMinNumMaxNum(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:384

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerFPOWI(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:380

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerFPTOSI(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:376

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerFPTOUI(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:375

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerFPTRUNC(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:379

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerFPTRUNC_F64_TO_F16(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:378

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerFunnelShift(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:368

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerFunnelShiftAsShifts(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:367

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerFunnelShiftWithInverse(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:366

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerInsert(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:394

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerIntrinsicRound(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:386

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerLoad(
    llvm::GAnyLoad& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:363

Parameters

llvm::GAnyLoad& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerMemCpyFamily(llvm::MachineInstr& MI,
                  unsigned int MaxLen = 0)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:409

Parameters

llvm::MachineInstr& MI

unsigned int MaxLen = 0

¶llvm::LegalizerHelper::LegalizeResult lowerMemcpy(
    llvm::MachineInstr& MI,
    llvm::Register Dst,
    llvm::Register Src,
    uint64_t KnownLen,
    uint64_t Limit,
    llvm::Align DstAlign,
    llvm::Align SrcAlign,
    bool IsVolatile)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:278

Parameters

llvm::MachineInstr& MI

llvm::Register Dst

llvm::Register Src

uint64_t KnownLen

uint64_t Limit

llvm::Align DstAlign

llvm::Align SrcAlign

bool IsVolatile

¶llvm::LegalizerHelper::LegalizeResult
lowerMemcpyInline(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:408

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerMemcpyInline(llvm::MachineInstr& MI,
                  llvm::Register Dst,
                  llvm::Register Src,
                  uint64_t KnownLen,
                  llvm::Align DstAlign,
                  llvm::Align SrcAlign,
                  bool IsVolatile)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:275

Parameters

llvm::MachineInstr& MI

llvm::Register Dst

llvm::Register Src

uint64_t KnownLen

llvm::Align DstAlign

llvm::Align SrcAlign

bool IsVolatile

¶llvm::LegalizerHelper::LegalizeResult
lowerMemmove(llvm::MachineInstr& MI,
             llvm::Register Dst,
             llvm::Register Src,
             uint64_t KnownLen,
             llvm::Align DstAlign,
             llvm::Align SrcAlign,
             bool IsVolatile)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:281

Parameters

llvm::MachineInstr& MI

llvm::Register Dst

llvm::Register Src

uint64_t KnownLen

llvm::Align DstAlign

llvm::Align SrcAlign

bool IsVolatile

¶llvm::LegalizerHelper::LegalizeResult lowerMemset(
    llvm::MachineInstr& MI,
    llvm::Register Dst,
    llvm::Register Val,
    uint64_t KnownLen,
    llvm::Align Alignment,
    bool IsVolatile)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:272

Parameters

llvm::MachineInstr& MI

llvm::Register Dst

llvm::Register Val

uint64_t KnownLen

llvm::Align Alignment

bool IsVolatile

¶llvm::LegalizerHelper::LegalizeResult
lowerMergeValues(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:388

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerMinMax(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:382

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerReadWriteRegister(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:401

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerRotate(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:370

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerRotateWithReverseRotate(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:369

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerSADDO_SSUBO(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:395

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerSITOFP(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:374

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerSMULH_UMULH(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:402

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerSelect(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:403

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerShlSat(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:398

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerShuffleVector(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:391

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerStore(
    llvm::GStore& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:364

Parameters

llvm::GStore& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerU64ToF32BitOps(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:372

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult lowerUITOFP(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:373

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerUnmergeValues(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:389

Parameters

llvm::MachineInstr& MI

¶llvm::LegalizerHelper::LegalizeResult
lowerVectorReduction(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:407

Parameters

llvm::MachineInstr& MI

¶void mergeMixedSubvectors(
    llvm::Register DstReg,
    ArrayRef<llvm::Register> PartRegs)

Description

Merge \p PartRegs with different types into \p DstReg.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:216

Parameters

llvm::Register DstReg

ArrayRef<llvm::Register> PartRegs

¶llvm::LegalizerHelper::LegalizeResult
moreElementsVector(llvm::MachineInstr& MI,
                   unsigned int TypeIdx,
                   llvm::LLT MoreTy)

Description

Legalize a vector instruction by increasing the number of vector elements involved and ignoring the added elements later.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:119

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT MoreTy

¶void moreElementsVectorDst(llvm::MachineInstr& MI,
                           llvm::LLT MoreTy,
                           unsigned int OpIdx)

Description

Legalize a single operand \p OpIdx of the machine instruction \p MI as a Def by performing it with additional vector elements and extracting the result elements, and replacing the vreg of the operand in place.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:155

Parameters

llvm::MachineInstr& MI

llvm::LLT MoreTy

unsigned int OpIdx

¶llvm::LegalizerHelper::LegalizeResult
moreElementsVectorPhi(llvm::MachineInstr& MI,
                      unsigned int TypeIdx,
                      llvm::LLT MoreTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:313

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT MoreTy

¶llvm::LegalizerHelper::LegalizeResult
moreElementsVectorShuffle(llvm::MachineInstr& MI,
                          unsigned int TypeIdx,
                          llvm::LLT MoreTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:315

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT MoreTy

¶void moreElementsVectorSrc(llvm::MachineInstr& MI,
                           llvm::LLT MoreTy,
                           unsigned int OpIdx)

Description

Legalize a single operand \p OpIdx of the machine instruction \p MI as a Use by producing a vector with undefined high elements, extracting the original vector type, and replacing the vreg of the operand in place.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:160

Parameters

llvm::MachineInstr& MI

llvm::LLT MoreTy

unsigned int OpIdx

¶void multiplyRegisters(
    SmallVectorImpl<llvm::Register>& DstRegs,
    ArrayRef<llvm::Register> Src1Regs,
    ArrayRef<llvm::Register> Src2Regs,
    llvm::LLT NarrowTy)

Description

Perform generic multiplication of values held in multiple registers. Generated instructions use only types NarrowTy and i1. Destination can be same or two times size of the source.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:261

Parameters

SmallVectorImpl<llvm::Register>& DstRegs

ArrayRef<llvm::Register> Src1Regs

ArrayRef<llvm::Register> Src2Regs

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
narrowScalar(llvm::MachineInstr& MI,
             unsigned int TypeIdx,
             llvm::LLT NarrowTy)

Description

Legalize an instruction by reducing the width of the underlying scalar type.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:98

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarAddSub(llvm::MachineInstr& MI,
                   unsigned int TypeIdx,
                   llvm::LLT NarrowTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:340

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarBasic(llvm::MachineInstr& MI,
                  unsigned int TypeIdx,
                  llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:347

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarCTLZ(llvm::MachineInstr& MI,
                 unsigned int TypeIdx,
                 llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:350

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarCTPOP(llvm::MachineInstr& MI,
                  unsigned int TypeIdx,
                  llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:352

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarCTTZ(llvm::MachineInstr& MI,
                 unsigned int TypeIdx,
                 llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:351

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶void narrowScalarDst(llvm::MachineInstr& MI,
                     llvm::LLT NarrowTy,
                     unsigned int OpIdx,
                     unsigned int ExtOpcode)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:150

Parameters

llvm::MachineInstr& MI

llvm::LLT NarrowTy

unsigned int OpIdx

unsigned int ExtOpcode

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarExt(llvm::MachineInstr& MI,
                unsigned int TypeIdx,
                llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:348

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarExtract(llvm::MachineInstr& MI,
                    unsigned int TypeIdx,
                    llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:344

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarFPTOI(llvm::MachineInstr& MI,
                  unsigned int TypeIdx,
                  llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:343

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarInsert(llvm::MachineInstr& MI,
                   unsigned int TypeIdx,
                   llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:345

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarMul(llvm::MachineInstr& MI,
                llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:342

Parameters

llvm::MachineInstr& MI

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarSelect(llvm::MachineInstr& MI,
                   unsigned int TypeIdx,
                   llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:349

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarShift(llvm::MachineInstr& MI,
                  unsigned int TypeIdx,
                  llvm::LLT Ty)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:339

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT Ty

¶llvm::LegalizerHelper::LegalizeResult
narrowScalarShiftByConstant(
    llvm::MachineInstr& MI,
    const llvm::APInt& Amt,
    llvm::LLT HalfTy,
    llvm::LLT ShiftAmtTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:330

Parameters

llvm::MachineInstr& MI

const llvm::APInt& Amt

llvm::LLT HalfTy

llvm::LLT ShiftAmtTy

¶void narrowScalarSrc(llvm::MachineInstr& MI,
                     llvm::LLT NarrowTy,
                     unsigned int OpIdx)

Description

Legalize a single operand \p OpIdx of the machine instruction \p MI as a Use by truncating the operand's type to \p NarrowTy using G_TRUNC, and replacing the vreg of the operand in place.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:139

Parameters

llvm::MachineInstr& MI

llvm::LLT NarrowTy

unsigned int OpIdx

¶llvm::LegalizerHelper::LegalizeResult
reduceLoadStoreWidth(llvm::GLoadStore& MI,
                     unsigned int TypeIdx,
                     llvm::LLT NarrowTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:327

Parameters

llvm::GLoadStore& MI

unsigned int TypeIdx

llvm::LLT NarrowTy

¶llvm::LegalizerHelper::LegalizeResult
tryNarrowPow2Reduction(llvm::MachineInstr& MI,
                       llvm::Register SrcReg,
                       llvm::LLT SrcTy,
                       llvm::LLT NarrowTy,
                       unsigned int ScalarOpc)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:267

Parameters

llvm::MachineInstr& MI

llvm::Register SrcReg

llvm::LLT SrcTy

llvm::LLT NarrowTy

unsigned int ScalarOpc

¶llvm::LegalizerHelper::LegalizeResult widenScalar(
    llvm::MachineInstr& MI,
    unsigned int TypeIdx,
    llvm::LLT WideTy)

Description

Legalize an instruction by performing the operation on a wider scalar type (for example a 16-bit addition can be safely performed at 32-bits precision, ignoring the unused bits).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:103

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy

¶llvm::LegalizerHelper::LegalizeResult
widenScalarAddSubOverflow(llvm::MachineInstr& MI,
                          unsigned int TypeIdx,
                          llvm::LLT WideTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:179

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy

¶llvm::LegalizerHelper::LegalizeResult
widenScalarAddSubShlSat(llvm::MachineInstr& MI,
                        unsigned int TypeIdx,
                        llvm::LLT WideTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:181

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy

¶void widenScalarDst(llvm::MachineInstr& MI,
                    llvm::LLT WideTy,
                    unsigned int OpIdx = 0,
                    unsigned int TruncOpcode =
                        TargetOpcode::G_TRUNC)

Description

Legalize a single operand \p OpIdx of the machine instruction \p MI as a Def by extending the operand's type to \p WideTy and truncating it back with the \p TruncOpcode, and replacing the vreg of the operand in place.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:144

Parameters

llvm::MachineInstr& MI

llvm::LLT WideTy

unsigned int OpIdx = 0

unsigned int TruncOpcode = TargetOpcode::G_TRUNC

¶llvm::LegalizerHelper::LegalizeResult
widenScalarExtract(llvm::MachineInstr& MI,
                   unsigned int TypeIdx,
                   llvm::LLT WideTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:176

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy

¶llvm::LegalizerHelper::LegalizeResult
widenScalarInsert(llvm::MachineInstr& MI,
                  unsigned int TypeIdx,
                  llvm::LLT WideTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:178

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy

¶llvm::LegalizerHelper::LegalizeResult
widenScalarMergeValues(llvm::MachineInstr& MI,
                       unsigned int TypeIdx,
                       llvm::LLT WideTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:172

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy

¶llvm::LegalizerHelper::LegalizeResult
widenScalarMulo(llvm::MachineInstr& MI,
                unsigned int TypeIdx,
                llvm::LLT WideTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:183

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy

¶void widenScalarSrc(llvm::MachineInstr& MI,
                    llvm::LLT WideTy,
                    unsigned int OpIdx,
                    unsigned int ExtOpcode)

Description

Legalize a single operand \p OpIdx of the machine instruction \p MI as a Use by extending the operand's type to \p WideTy using the specified \p ExtOpcode for the extension instruction, and replacing the vreg of the operand in place.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:133

Parameters

llvm::MachineInstr& MI

llvm::LLT WideTy

unsigned int OpIdx

unsigned int ExtOpcode

¶llvm::LegalizerHelper::LegalizeResult
widenScalarUnmergeValues(llvm::MachineInstr& MI,
                         unsigned int TypeIdx,
                         llvm::LLT WideTy)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h:174

Parameters

llvm::MachineInstr& MI

unsigned int TypeIdx

llvm::LLT WideTy