class X86RegisterBankInfo

Declaration

class X86RegisterBankInfo : public X86GenRegisterBankInfo { /* full declaration omitted */ };

Description

This class provides the information for the target register banks.

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:43

Inherits from: X86GenRegisterBankInfo

Member Variables

Inherited from X86GenRegisterBankInfo:

protected static PartMappings

protected static ValMappings

Inherited from RegisterBankInfo:

protected RegBanks

protected NumRegBanks

protected MapOfPartialMappings

protected MapOfValueMappings

protected MapOfOperandsMappings

protected MapOfInstructionMappings

protected PhysRegMinimalRCs

public static DefaultMappingID

public static InvalidMappingID

Method Overview

• public X86RegisterBankInfo(const llvm::TargetRegisterInfo & TRI)
• public void applyMappingImpl(const llvm::RegisterBankInfo::OperandsMapper & OpdMapper) const
• public llvm::RegisterBankInfo::InstructionMappings getInstrAlternativeMappings(const llvm::MachineInstr & MI) const
• public const llvm::RegisterBankInfo::InstructionMapping & getInstrMapping(const llvm::MachineInstr & MI) const
• private static void getInstrPartialMappingIdxs(const llvm::MachineInstr & MI, const llvm::MachineRegisterInfo & MRI, const bool isFP, SmallVectorImpl<llvm::X86GenRegisterBankInfo::PartialMappingIdx> & OpRegBankIdx)
• private static bool getInstrValueMapping(const llvm::MachineInstr & MI, const SmallVectorImpl<llvm::X86GenRegisterBankInfo::PartialMappingIdx> & OpRegBankIdx, SmallVectorImpl<const llvm::RegisterBankInfo::ValueMapping *> & OpdsMapping)
• public const llvm::RegisterBank & getRegBankFromRegClass(const llvm::TargetRegisterClass & RC, llvm::LLT) const
• private const llvm::RegisterBankInfo::InstructionMapping & getSameOperandsMapping(const llvm::MachineInstr & MI, bool isFP) const

Inherited from X86GenRegisterBankInfo:

• protected getPartialMappingIdx
• protected getValueMapping

Inherited from RegisterBankInfo:

• public applyDefaultMapping
• public applyMapping
• public applyMappingImpl
• public cannotCopy
• public constrainGenericRegister
• public copyCost
• public getBreakDownCost
• public getInstrAlternativeMappings
• public getInstrMapping
• protected getInstrMappingImpl
• public getInstrPossibleMappings
• public getInstructionMapping
• public getInvalidInstructionMapping
• protected getMinimalPhysRegClass
• public getNumRegBanks
• protected getOperandsMapping
• protected getOperandsMapping
• protected getOperandsMapping
• protected getPartialMapping
• public getRegBank
• public getRegBank
• protected getRegBank
• public getRegBankFromConstraints
• public getRegBankFromRegClass
• public getSizeInBits
• protected getValueMapping
• protected getValueMapping
• public verify

Methods

¶X86RegisterBankInfo(
    const llvm::TargetRegisterInfo& TRI)

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:65

Parameters

const llvm::TargetRegisterInfo& TRI

¶void applyMappingImpl(
    const llvm::RegisterBankInfo::OperandsMapper&
        OpdMapper) const

Description

See RegisterBankInfo::applyMapping.

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:74

Parameters

const llvm::RegisterBankInfo::OperandsMapper& OpdMapper

¶llvm::RegisterBankInfo::InstructionMappings
getInstrAlternativeMappings(
    const llvm::MachineInstr& MI) const

Description

Get the alternative mappings for \p MI. Alternative in the sense different from getInstrMapping.

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:71

Parameters

const llvm::MachineInstr& MI

¶const llvm::RegisterBankInfo::InstructionMapping&
getInstrMapping(
    const llvm::MachineInstr& MI) const

Description

Get the mapping of the different operands of \p MI on the register bank. This mapping should be the direct translation of \p MI. In other words, when \p MI is mapped with the returned mapping, only the register banks of the operands of \p MI need to be updated. In particular, neither the opcode nor the type of \p MI needs to be updated for this direct mapping. The target independent implementation gives a mapping based on the register classes for the target specific opcode. It uses the ID RegisterBankInfo::DefaultMappingID for that mapping. Make sure you do not use that ID for the alternative mapping for MI. See getInstrAlternativeMappings for the alternative mappings. For instance, if \p MI is a vector add, the mapping should not be a scalarization of the add.

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:77

Parameters

const llvm::MachineInstr& MI

¶static void getInstrPartialMappingIdxs(
    const llvm::MachineInstr& MI,
    const llvm::MachineRegisterInfo& MRI,
    const bool isFP,
    SmallVectorImpl<llvm::X86GenRegisterBankInfo::
                        PartialMappingIdx>&
        OpRegBankIdx)

Description

Track the bank of each instruction operand(register)

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:53

Parameters

const llvm::MachineInstr& MI

const llvm::MachineRegisterInfo& MRI

const bool isFP

SmallVectorImpl<llvm::X86GenRegisterBankInfo:: PartialMappingIdx>& OpRegBankIdx

¶static bool getInstrValueMapping(
    const llvm::MachineInstr& MI,
    const SmallVectorImpl<
        llvm::X86GenRegisterBankInfo::
            PartialMappingIdx>& OpRegBankIdx,
    SmallVectorImpl<const llvm::RegisterBankInfo::
                        ValueMapping*>&
        OpdsMapping)

Description

Construct the instruction ValueMapping from PartialMappingIdxs

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:60

Parameters

const llvm::MachineInstr& MI

const SmallVectorImpl< llvm::X86GenRegisterBankInfo:: PartialMappingIdx>& OpRegBankIdx

SmallVectorImpl< const llvm::RegisterBankInfo::ValueMapping*>& OpdsMapping

Returns

true if mapping succeeded.

¶const llvm::RegisterBank& getRegBankFromRegClass(
    const llvm::TargetRegisterClass& RC,
    llvm::LLT) const

Description

Get a register bank that covers \p RC.

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:67

Parameters

const llvm::TargetRegisterClass& RC

llvm::LLT

¶const llvm::RegisterBankInfo::InstructionMapping&
getSameOperandsMapping(
    const llvm::MachineInstr& MI,
    bool isFP) const

Description

Get an instruction mapping.

Declared at: llvm/lib/Target/X86/X86RegisterBankInfo.h:48

Parameters

const llvm::MachineInstr& MI

bool isFP

Returns

An InstructionMappings with a statically allocated OperandsMapping.