class CombinerHelper

Declaration

class CombinerHelper { /* full declaration omitted */ };

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:108

Member Variables

protected llvm::MachineIRBuilder& Builder
protected llvm::MachineRegisterInfo& MRI
protected llvm::GISelChangeObserver& Observer
protected llvm::GISelKnownBits* KB
protected llvm::MachineDominatorTree* MDT
protected const llvm::LegalizerInfo* LI
protected const llvm::RegisterBankInfo* RBI
protected const llvm::TargetRegisterInfo* TRI

Method Overview

Methods

CombinerHelper(
    llvm::GISelChangeObserver& Observer,
    llvm::MachineIRBuilder& B,
    llvm::GISelKnownBits* KB = nullptr,
    llvm::MachineDominatorTree* MDT = nullptr,
    const llvm::LegalizerInfo* LI = nullptr)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:120

Parameters

llvm::GISelChangeObserver& Observer
llvm::MachineIRBuilder& B
llvm::GISelKnownBits* KB = nullptr
llvm::MachineDominatorTree* MDT = nullptr
const llvm::LegalizerInfo* LI = nullptr

void applyAshShlToSextInreg(
    llvm::MachineInstr& MI,
    std::tuple<Register, int64_t>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:500

Parameters

llvm::MachineInstr& MI
std::tuple<Register, int64_t>& MatchInfo

void applyBuildFn(llvm::MachineInstr& MI,
                  llvm::BuildFnTy& MatchInfo)

Description

Use a function which takes in a MachineIRBuilder to perform a combine. By default, it erases the instruction \p MI from the function.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:588

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

void applyBuildFnNoErase(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Use a function which takes in a MachineIRBuilder to perform a combine. This variant does not erase \p MI after calling the build function.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:591

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

void applyBuildInstructionSteps(
    llvm::MachineInstr& MI,
    llvm::InstructionStepsMatchInfo& MatchInfo)

Description

Replace \p MI with a series of instructions described in \p MatchInfo.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:494

Parameters

llvm::MachineInstr& MI
llvm::InstructionStepsMatchInfo& MatchInfo

void applyCombineAddP2IToPtrAdd(
    llvm::MachineInstr& MI,
    std::pair<Register, bool>& PtrRegAndCommute)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:371

Parameters

llvm::MachineInstr& MI
std::pair<Register, bool>& PtrRegAndCommute

void applyCombineAnyExtTrunc(
    llvm::MachineInstr& MI,
    llvm::Register& Reg)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:380

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

void applyCombineConcatVectors(
    llvm::MachineInstr& MI,
    bool IsUndef,
    const ArrayRef<llvm::Register> Ops)

Description

Replace \p MI with a flattened build_vector with \p Ops or an implicit_def if IsUndef is true.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:239

Parameters

llvm::MachineInstr& MI
bool IsUndef
const ArrayRef<llvm::Register> Ops

void applyCombineConstPtrAddToI2P(
    llvm::MachineInstr& MI,
    llvm::APInt& NewCst)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:376

Parameters

llvm::MachineInstr& MI
llvm::APInt& NewCst

void applyCombineConstantFoldFpUnary(
    llvm::MachineInstr& MI,
    Optional<llvm::APFloat>& Cst)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:356

Parameters

llvm::MachineInstr& MI
Optional<llvm::APFloat>& Cst

void applyCombineCopy(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:173

Parameters

llvm::MachineInstr& MI

void applyCombineDivRem(
    llvm::MachineInstr& MI,
    llvm::MachineInstr*& OtherMI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:212

Parameters

llvm::MachineInstr& MI
llvm::MachineInstr*& OtherMI

void applyCombineExtOfExt(
    llvm::MachineInstr& MI,
    std::tuple<Register, unsigned int>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:388

Parameters

llvm::MachineInstr& MI
std::tuple<Register, unsigned int>& MatchInfo

void applyCombineExtendingLoads(
    llvm::MachineInstr& MI,
    llvm::PreferredTuple& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:191

Parameters

llvm::MachineInstr& MI
llvm::PreferredTuple& MatchInfo

void applyCombineFAbsOfFAbs(
    llvm::MachineInstr& MI,
    llvm::Register& Src)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:396

Parameters

llvm::MachineInstr& MI
llvm::Register& Src

void applyCombineI2PToP2I(llvm::MachineInstr& MI,
                          llvm::Register& Reg)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:361

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

void applyCombineIndexedLoadStore(
    llvm::MachineInstr& MI,
    llvm::IndexedLoadStoreMatchInfo& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:200

Parameters

llvm::MachineInstr& MI
llvm::IndexedLoadStoreMatchInfo& MatchInfo

void applyCombineInsertVecElts(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::Register>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:556

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::Register>& MatchInfo

void applyCombineMulByNegativeOne(
    llvm::MachineInstr& MI)

Description

Transform G_MUL(x, -1) to G_SUB(0, x)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:415

Parameters

llvm::MachineInstr& MI

void applyCombineMulToShl(llvm::MachineInstr& MI,
                          unsigned int& ShiftVal)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:308

Parameters

llvm::MachineInstr& MI
unsigned int& ShiftVal

void applyCombineP2IToI2P(llvm::MachineInstr& MI,
                          llvm::Register& Reg)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:365

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

void applyCombineShiftToUnmerge(
    llvm::MachineInstr& MI,
    const unsigned int& ShiftVal)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:323

Parameters

llvm::MachineInstr& MI
const unsigned int& ShiftVal

void applyCombineShlOfExtend(
    llvm::MachineInstr& MI,
    const llvm::RegisterImmPair& MatchData)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:313

Parameters

llvm::MachineInstr& MI
const llvm::RegisterImmPair& MatchData

void applyCombineShuffleVector(
    llvm::MachineInstr& MI,
    const ArrayRef<llvm::Register> Ops)

Description

Replace \p MI with a concat_vectors with \p Ops.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:256

Parameters

llvm::MachineInstr& MI
const ArrayRef<llvm::Register> Ops

void applyCombineTruncOfExt(
    llvm::MachineInstr& MI,
    std::pair<Register, unsigned int>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:404

Parameters

llvm::MachineInstr& MI
std::pair<Register, unsigned int>& MatchInfo

void applyCombineTruncOfShl(
    llvm::MachineInstr& MI,
    std::pair<Register, Register>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:411

Parameters

llvm::MachineInstr& MI
std::pair<Register, Register>& MatchInfo

void applyCombineUnmergeConstant(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::APInt>& Csts)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:337

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::APInt>& Csts

void applyCombineUnmergeMergeToPlainValues(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::Register>& Operands)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:331

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::Register>& Operands

void applyCombineUnmergeWithDeadLanesToTrunc(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:347

Parameters

llvm::MachineInstr& MI

void applyCombineUnmergeZExtToZExt(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:351

Parameters

llvm::MachineInstr& MI

void applyExtendThroughPhis(
    llvm::MachineInstr& MI,
    llvm::MachineInstr*& ExtMI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:574

Parameters

llvm::MachineInstr& MI
llvm::MachineInstr*& ExtMI

void applyExtractAllEltsFromBuildVector(
    llvm::MachineInstr& MI,
    SmallVectorImpl<
        std::pair<Register, MachineInstr*>>&
        MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:582

Parameters

llvm::MachineInstr& MI
SmallVectorImpl< std::pair<Register, MachineInstr*>>& MatchInfo

void applyExtractVecEltBuildVec(
    llvm::MachineInstr& MI,
    llvm::Register& Reg)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:577

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

bool applyFoldBinOpIntoSelect(
    llvm::MachineInstr& MI,
    const unsigned int& SelectOpNo)

Description

\p SelectOperand is the operand in binary operator \p MI that is the select to fold.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:551

Parameters

llvm::MachineInstr& MI
const unsigned int& SelectOpNo

void applyFunnelShiftToRotate(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:595

Parameters

llvm::MachineInstr& MI

void applyNotCmp(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::Register>& RegsToNegate)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:529

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::Register>& RegsToNegate

void applyOptBrCondByInvertingCond(
    llvm::MachineInstr& MI,
    llvm::MachineInstr*& BrCond)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:217

Parameters

llvm::MachineInstr& MI
llvm::MachineInstr*& BrCond

void applyPtrAddImmedChain(
    llvm::MachineInstr& MI,
    llvm::PtrAddChain& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:292

Parameters

llvm::MachineInstr& MI
llvm::PtrAddChain& MatchInfo

void applyPtrAddZero(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:541

Parameters

llvm::MachineInstr& MI

void applyRotateOutOfRange(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:597

Parameters

llvm::MachineInstr& MI

void applySextInRegOfLoad(
    llvm::MachineInstr& MI,
    std::tuple<Register, unsigned int>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:207

Parameters

llvm::MachineInstr& MI
std::tuple<Register, unsigned int>& MatchInfo

void applySextTruncSextLoad(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:203

Parameters

llvm::MachineInstr& MI

void applyShiftImmedChain(
    llvm::MachineInstr& MI,
    llvm::RegisterImmPair& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:296

Parameters

llvm::MachineInstr& MI
llvm::RegisterImmPair& MatchInfo

void applyShiftOfShiftedLogic(
    llvm::MachineInstr& MI,
    llvm::ShiftOfShiftedLogic& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:303

Parameters

llvm::MachineInstr& MI
llvm::ShiftOfShiftedLogic& MatchInfo

void applySimplifyAddToSub(
    llvm::MachineInstr& MI,
    std::tuple<Register, Register>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:485

Parameters

llvm::MachineInstr& MI
std::tuple<Register, Register>& MatchInfo

void applySimplifyURemByPow2(
    llvm::MachineInstr& MI)

Description

Combine G_UREM x, (known power of 2) to an add and bitmasking.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:544

Parameters

llvm::MachineInstr& MI

void applyTruncStoreMerge(
    llvm::MachineInstr& MI,
    llvm::MergeTruncStoresInfo& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:571

Parameters

llvm::MachineInstr& MI
llvm::MergeTruncStoresInfo& MatchInfo

void applyUDivByConst(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:648

Parameters

llvm::MachineInstr& MI

void applyUMulHToLShr(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:652

Parameters

llvm::MachineInstr& MI

void applyXorOfAndWithSameReg(
    llvm::MachineInstr& MI,
    std::pair<Register, Register>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:535

Parameters

llvm::MachineInstr& MI
std::pair<Register, Register>& MatchInfo

llvm::MachineInstr* buildUDivUsingMul(
    llvm::MachineInstr& MI)

Description

Given an G_UDIV \p MI expressing a divide by constant, return an expression that implements it by multiplying by a magic number. Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide".

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:645

Parameters

llvm::MachineInstr& MI

bool canCombineFMadOrFMA(
    llvm::MachineInstr& MI,
    bool& AllowFusionGlobally,
    bool& HasFMAD,
    bool& Aggressive,
    bool CanReassociate = false)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:686

Parameters

llvm::MachineInstr& MI
bool& AllowFusionGlobally
bool& HasFMAD
bool& Aggressive
bool CanReassociate = false

bool dominates(const llvm::MachineInstr& DefMI,
               const llvm::MachineInstr& UseMI)

Description

Returns true if \p DefMI dominates \p UseMI. By definition an instruction dominates itself. If we haven't been provided with a MachineDominatorTree during construction, this function returns a conservative result that tracks just a single basic block.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:185

Parameters

const llvm::MachineInstr& DefMI
const llvm::MachineInstr& UseMI

bool eraseInst(llvm::MachineInstr& MI)

Description

Erase \p MI

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:480

Parameters

llvm::MachineInstr& MI

Optional<SmallVector<llvm::Register, 8>>
findCandidatesForLoadOrCombine(
    const llvm::MachineInstr* Root) const

Description

Helper function for matchLoadOrCombine. Searches for Registers which may have been produced by a load instruction + some arithmetic.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:765

Parameters

const llvm::MachineInstr* Root
- The search root.

Returns

The Registers found during the search.

Optional<
    std::tuple<GZExtLoad*, int64_t, GZExtLoad*>>
findLoadOffsetsForLoadOrCombine(
    SmallDenseMap<int64_t, int64_t, 8>&
        MemOffset2Idx,
    const SmallVector<llvm::Register, 8>&
        RegsToVisit,
    const unsigned int MemSizeInBits)

Description

Helper function for matchLoadOrCombine. Checks if every register in \p RegsToVisit is defined by a load instruction + some arithmetic.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:779

Parameters

SmallDenseMap<int64_t, int64_t, 8>& MemOffset2Idx
- Maps the byte positions each load ends up at to the index of the load.
const SmallVector<llvm::Register, 8>& RegsToVisit
const unsigned int MemSizeInBits
- The number of bits each load should produce.

Returns

On success, a 3-tuple containing lowest-index load found, the lowest index, and the last load in the sequence.

bool findPostIndexCandidate(
    llvm::MachineInstr& MI,
    llvm::Register& Addr,
    llvm::Register& Base,
    llvm::Register& Offset)

Description

Given a non-indexed load or store instruction \p MI, find an offset that can be usefully and legally folded into it as a post-indexing operation.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:748

Parameters

llvm::MachineInstr& MI
llvm::Register& Addr
llvm::Register& Base
llvm::Register& Offset

Returns

true if a candidate is found.

bool findPreIndexCandidate(llvm::MachineInstr& MI,
                           llvm::Register& Addr,
                           llvm::Register& Base,
                           llvm::Register& Offset)

Description

Given a non-indexed load or store instruction \p MI, find an offset that can be usefully and legally folded into it as a pre-indexing operation.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:755

Parameters

llvm::MachineInstr& MI
llvm::Register& Addr
llvm::Register& Base
llvm::Register& Offset

Returns

true if a candidate is found.

llvm::GISelKnownBits* getKnownBits() const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:125

const llvm::RegisterBank* getRegBank(
    llvm::Register Reg) const

Description

Get the register bank of \p Reg. If Reg has not been assigned a register, a register class, or a register bank, then this returns nullptr.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:162

Parameters

llvm::Register Reg

const llvm::TargetLowering& getTargetLowering()
    const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:129

bool isConstantLegalOrBeforeLegalizer(
    const llvm::LLT Ty) const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:143

Parameters

const llvm::LLT Ty

Returns

true if the combine is running prior to legalization, or if \p Ty is a legal integer constant type on the target.

bool isLegal(
    const llvm::LegalityQuery& Query) const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:135

Parameters

const llvm::LegalityQuery& Query

Returns

true if \p Query is legal on the target.

bool isLegalOrBeforeLegalizer(
    const llvm::LegalityQuery& Query) const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:139

Parameters

const llvm::LegalityQuery& Query

Returns

true if the combine is running prior to legalization, or if \p Query is legal on the target.

bool isPreLegalize() const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:132

Returns

true if the combiner is running pre-legalization.

bool isPredecessor(
    const llvm::MachineInstr& DefMI,
    const llvm::MachineInstr& UseMI)

Description

Returns true if \p DefMI precedes \p UseMI or they are the same instruction. Both must be in the same basic block.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:177

Parameters

const llvm::MachineInstr& DefMI
const llvm::MachineInstr& UseMI

bool matchAddOBy0(llvm::MachineInstr& MI,
                  llvm::BuildFnTy& MatchInfo)

Description

Match: (G_*ADDO x, 0) -> x + no carry out

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:675

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchAddSubSameReg(llvm::MachineInstr& MI,
                        llvm::Register& Src)

Description

Transform G_ADD(x, G_SUB(y, x)) to y. Transform G_ADD(G_SUB(y, x), x) to y.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:741

Parameters

llvm::MachineInstr& MI
llvm::Register& Src

bool matchAllExplicitUsesAreUndef(
    llvm::MachineInstr& MI)

Description

Return true if all register explicit use operands on \p MI are defined by a G_IMPLICIT_DEF.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:423

Parameters

llvm::MachineInstr& MI

bool matchAndOrDisjointMask(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:610

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

Returns

true if (and (or x, c1), c2) can be replaced with (and x, c2)

bool matchAnyExplicitUseIsUndef(
    llvm::MachineInstr& MI)

Description

Return true if any explicit use operand on \p MI is defined by a G_IMPLICIT_DEF.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:419

Parameters

llvm::MachineInstr& MI

bool matchAshrShlToSextInreg(
    llvm::MachineInstr& MI,
    std::tuple<Register, int64_t>& MatchInfo)

Description

Match ashr (shl x, C), C -> sext_inreg (C)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:498

Parameters

llvm::MachineInstr& MI
std::tuple<Register, int64_t>& MatchInfo

bool matchBinOpSameVal(llvm::MachineInstr& MI)

Description

Optimize (x op x) -> x

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:468

Parameters

llvm::MachineInstr& MI

bool matchBitfieldExtractFromAnd(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Match: and (lshr x, cst), mask -> ubfx x, cst, width

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:615

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchBitfieldExtractFromSExtInReg(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Form a G_SBFX from a G_SEXT_INREG fed by a right shift.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:612

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchBitfieldExtractFromShr(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Match: shr (shl x, n), k -> sbfx/ubfx x, pos, width

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:618

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchBitfieldExtractFromShrAnd(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Match: shr (and x, n), k -> ubfx x, pos, width

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:621

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineAddP2IToPtrAdd(
    llvm::MachineInstr& MI,
    std::pair<Register, bool>& PtrRegAndCommute)

Description

Transform G_ADD (G_PTRTOINT x), y -> G_PTRTOINT (G_PTR_ADD x, y) Transform G_ADD y, (G_PTRTOINT x) -> G_PTRTOINT (G_PTR_ADD x, y)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:369

Parameters

llvm::MachineInstr& MI
std::pair<Register, bool>& PtrRegAndCommute

bool matchCombineAnyExtTrunc(
    llvm::MachineInstr& MI,
    llvm::Register& Reg)

Description

Transform anyext(trunc(x)) to x.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:379

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

bool matchCombineConcatVectors(
    llvm::MachineInstr& MI,
    bool& IsUndef,
    SmallVectorImpl<llvm::Register>& Ops)

Description

Check if the G_CONCAT_VECTORS \p MI is undef or if it can be flattened into a build_vector. In the first case \p IsUndef will be true. In the second case \p Ops will contain the operands needed to produce the flattened build_vector.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:235

Parameters

llvm::MachineInstr& MI
bool& IsUndef
SmallVectorImpl<llvm::Register>& Ops

bool matchCombineConstPtrAddToI2P(
    llvm::MachineInstr& MI,
    llvm::APInt& NewCst)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:375

Parameters

llvm::MachineInstr& MI
llvm::APInt& NewCst

bool matchCombineConstantFoldFpUnary(
    llvm::MachineInstr& MI,
    Optional<llvm::APFloat>& Cst)

Description

Transform fp_instr(cst) to constant result of the fp operation.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:354

Parameters

llvm::MachineInstr& MI
Optional<llvm::APFloat>& Cst

bool matchCombineCopy(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:172

Parameters

llvm::MachineInstr& MI

bool matchCombineDivRem(
    llvm::MachineInstr& MI,
    llvm::MachineInstr*& OtherMI)

Description

Try to combine G_[SU]DIV and G_[SU]REM into a single G_[SU]DIVREM when their source operands are identical.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:211

Parameters

llvm::MachineInstr& MI
llvm::MachineInstr*& OtherMI

bool matchCombineExtOfExt(
    llvm::MachineInstr& MI,
    std::tuple<Register, unsigned int>& MatchInfo)

Description

Transform [asz]ext([asz]ext(x)) to [asz]ext x.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:386

Parameters

llvm::MachineInstr& MI
std::tuple<Register, unsigned int>& MatchInfo

bool matchCombineExtendingLoads(
    llvm::MachineInstr& MI,
    llvm::PreferredTuple& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:190

Parameters

llvm::MachineInstr& MI
llvm::PreferredTuple& MatchInfo

bool matchCombineFAbsOfFAbs(
    llvm::MachineInstr& MI,
    llvm::Register& Src)

Description

Match fabs(fabs(x)) to fabs(x).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:395

Parameters

llvm::MachineInstr& MI
llvm::Register& Src

bool matchCombineFAbsOfFNeg(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform fabs(fneg(x)) to fabs(x).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:399

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFAddFMAFMulToFMadOrFMA(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z)) (fadd (fmad x, y, (fmul u, v)), z) -> (fmad x, y, (fmad u, v, z))

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:701

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFAddFMulToFMadOrFMA(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fadd (fmul x, y), z) -> (fma x, y, z) (fadd (fmul x, y), z) -> (fmad x, y, z)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:692

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFAddFpExtFMulToFMadOrFMA(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z) (fadd (fpext (fmul x, y)), z) -> (fmad (fpext x), (fpext y), z)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:696

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFAddFpExtFMulToFMadOrFMAAggressive(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:708

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFMinMaxNaN(
    llvm::MachineInstr& MI,
    unsigned int& Info)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:737

Parameters

llvm::MachineInstr& MI
unsigned int& Info

bool matchCombineFNegOfFNeg(
    llvm::MachineInstr& MI,
    llvm::Register& Reg)

Description

Transform fneg(fneg(x)) to x.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:392

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

bool matchCombineFSubFMulToFMadOrFMA(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fsub (fmul x, y), z) -> (fma x, y, -z) (fsub (fmul x, y), z) -> (fmad x, y, -z)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:713

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFSubFNegFMulToFMadOrFMA(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z)) (fsub (fneg (fmul, x, y)), z) -> (fmad (fneg x), y, (fneg z))

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:717

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFSubFpExtFMulToFMadOrFMA(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z)) (fsub (fpext (fmul x, y)), z) -> (fmad (fpext x), (fpext y), (fneg z))

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:724

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineFSubFpExtFNegFMulToFMadOrFMA(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fma (fpext x), (fpext y), z)) (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fmad (fpext x), (fpext y), z))

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:731

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineI2PToP2I(llvm::MachineInstr& MI,
                          llvm::Register& Reg)

Description

Transform IntToPtr(PtrToInt(x)) to x if cast is in the same address space.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:360

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

bool matchCombineIndexedLoadStore(
    llvm::MachineInstr& MI,
    llvm::IndexedLoadStoreMatchInfo& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:199

Parameters

llvm::MachineInstr& MI
llvm::IndexedLoadStoreMatchInfo& MatchInfo

bool matchCombineInsertVecElts(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::Register>& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:553

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::Register>& MatchInfo

bool matchCombineLoadWithAndMask(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Match (and (load x), mask) -> zextload x

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:194

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchCombineMergeUnmerge(
    llvm::MachineInstr& MI,
    llvm::Register& MatchInfo)

Description

Fold away a merge of an unmerge of the corresponding values.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:317

Parameters

llvm::MachineInstr& MI
llvm::Register& MatchInfo

bool matchCombineMulToShl(llvm::MachineInstr& MI,
                          unsigned int& ShiftVal)

Description

Transform a multiply by a power-of-2 value to a left shift.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:307

Parameters

llvm::MachineInstr& MI
unsigned int& ShiftVal

bool matchCombineP2IToI2P(llvm::MachineInstr& MI,
                          llvm::Register& Reg)

Description

Transform PtrToInt(IntToPtr(x)) to x.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:364

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

bool matchCombineShiftToUnmerge(
    llvm::MachineInstr& MI,
    unsigned int TargetShiftSize,
    unsigned int& ShiftVal)

Description

Reduce a shift by a constant to an unmerge and a shift on a half sized type. This will not produce a shift smaller than \p TargetShiftSize.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:321

Parameters

llvm::MachineInstr& MI
unsigned int TargetShiftSize
unsigned int& ShiftVal

bool matchCombineShlOfExtend(
    llvm::MachineInstr& MI,
    llvm::RegisterImmPair& MatchData)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:312

Parameters

llvm::MachineInstr& MI
llvm::RegisterImmPair& MatchData

bool matchCombineShuffleVector(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::Register>& Ops)

Description

Check if the G_SHUFFLE_VECTOR \p MI can be replaced by a concat_vectors.\p Ops will contain the operands needed to produce the flattened concat_vectors.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:253

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::Register>& Ops

bool matchCombineTruncOfExt(
    llvm::MachineInstr& MI,
    std::pair<Register, unsigned int>& MatchInfo)

Description

Transform trunc ([asz]ext x) to x or ([asz]ext x) or (trunc x).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:402

Parameters

llvm::MachineInstr& MI
std::pair<Register, unsigned int>& MatchInfo

bool matchCombineTruncOfShl(
    llvm::MachineInstr& MI,
    std::pair<Register, Register>& MatchInfo)

Description

Transform trunc (shl x, K) to shl (trunc x), K => K < VT.getScalarSizeInBits().

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:409

Parameters

llvm::MachineInstr& MI
std::pair<Register, Register>& MatchInfo

bool matchCombineUnmergeConstant(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::APInt>& Csts)

Description

Transform G_UNMERGE Constant -> Constant1, Constant2, ...

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:335

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::APInt>& Csts

bool matchCombineUnmergeMergeToPlainValues(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::Register>& Operands)

Description

Transform <ty ,...> G_UNMERGE(G_MERGE ty X, Y, Z) -> ty X, Y, Z.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:328

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::Register>& Operands

bool matchCombineUnmergeUndef(
    llvm::MachineInstr& MI,
    std::function<void(MachineIRBuilder&)>&
        MatchInfo)

Description

Transform G_UNMERGE G_IMPLICIT_DEF -> G_IMPLICIT_DEF, G_IMPLICIT_DEF, ...

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:342

Parameters

llvm::MachineInstr& MI
std::function<void(MachineIRBuilder&)>& MatchInfo

bool matchCombineUnmergeWithDeadLanesToTrunc(
    llvm::MachineInstr& MI)

Description

Transform X, Y <dead > = G_UNMERGE Z -> X = G_TRUNC Z.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:346

Parameters

llvm::MachineInstr& MI

bool matchCombineUnmergeZExtToZExt(
    llvm::MachineInstr& MI)

Description

Transform X, Y = G_UNMERGE(G_ZEXT(Z)) -> X = G_ZEXT(Z); Y = G_CONSTANT 0

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:350

Parameters

llvm::MachineInstr& MI

bool matchCombineZextTrunc(llvm::MachineInstr& MI,
                           llvm::Register& Reg)

Description

Transform zext(trunc(x)) to x.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:383

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

bool matchConstantFold(llvm::MachineInstr& MI,
                       llvm::APInt& MatchInfo)

Description

Do constant folding when opportunities are exposed after MIR building.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:636

Parameters

llvm::MachineInstr& MI
llvm::APInt& MatchInfo

bool matchConstantOp(
    const llvm::MachineOperand& MOP,
    int64_t C)

Description

Return true if \p MOP is defined by a G_CONSTANT with a value equal to\p C.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:462

Parameters

const llvm::MachineOperand& MOP
int64_t C

bool matchConstantSelectCmp(
    llvm::MachineInstr& MI,
    unsigned int& OpIdx)

Description

Return true if a G_SELECT instruction \p MI has a constant comparison. If true, \p OpIdx will store the operand index of the known selected value.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:436

Parameters

llvm::MachineInstr& MI
unsigned int& OpIdx

bool matchEqualDefs(
    const llvm::MachineOperand& MOP1,
    const llvm::MachineOperand& MOP2)

Description

Return true if \p MOP1 and \p MOP2 are register operands are defined by equivalent instructions.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:458

Parameters

const llvm::MachineOperand& MOP1
const llvm::MachineOperand& MOP2

bool matchExtendThroughPhis(
    llvm::MachineInstr& MI,
    llvm::MachineInstr*& ExtMI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:573

Parameters

llvm::MachineInstr& MI
llvm::MachineInstr*& ExtMI

bool matchExtractAllEltsFromBuildVector(
    llvm::MachineInstr& MI,
    SmallVectorImpl<
        std::pair<Register, MachineInstr*>>&
        MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:579

Parameters

llvm::MachineInstr& MI
SmallVectorImpl< std::pair<Register, MachineInstr*>>& MatchInfo

bool matchExtractVecEltBuildVec(
    llvm::MachineInstr& MI,
    llvm::Register& Reg)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:576

Parameters

llvm::MachineInstr& MI
llvm::Register& Reg

bool matchFoldBinOpIntoSelect(
    llvm::MachineInstr& MI,
    unsigned int& SelectOpNo)

Description

Push a binary operator through a select on constants. binop (select cond, K0, K1), K2 -> select cond, (binop K0, K2), (binop K1, K2)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:550

Parameters

llvm::MachineInstr& MI
unsigned int& SelectOpNo

bool matchFunnelShiftToRotate(
    llvm::MachineInstr& MI)

Description

Match an FSHL or FSHR that can be combined to a ROTR or ROTL rotate.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:594

Parameters

llvm::MachineInstr& MI

bool matchHoistLogicOpWithSameOpcodeHands(
    llvm::MachineInstr& MI,
    llvm::InstructionStepsMatchInfo& MatchInfo)

Description

Match (logic_op (op x...), (op y...)) -> (op (logic_op x, y))

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:490

Parameters

llvm::MachineInstr& MI
llvm::InstructionStepsMatchInfo& MatchInfo

bool matchICmpToLHSKnownBits(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:606

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

Returns

true if a G_ICMP \p MI can be replaced with its LHS based off of KnownBits information.

bool matchICmpToTrueFalseKnownBits(
    llvm::MachineInstr& MI,
    int64_t& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:601

Parameters

llvm::MachineInstr& MI
int64_t& MatchInfo

Returns

true if a G_ICMP instruction \p MI can be replaced with a true or false constant based off of KnownBits information.

bool matchLoadOrCombine(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Match expression trees of the form And check if the tree can be replaced with a M-bit load + possibly a bswap.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:568

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchMulOBy0(llvm::MachineInstr& MI,
                  llvm::BuildFnTy& MatchInfo)

Description

Match: (G_*MULO x, 0) -> 0 + no carry out

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:671

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchMulOBy2(llvm::MachineInstr& MI,
                  llvm::BuildFnTy& MatchInfo)

Description

Match: (G_UMULO x, 2) -> (G_UADDO x, x) (G_SMULO x, 2) -> (G_SADDO x, x)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:667

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchNarrowBinopFeedingAnd(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:640

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

Returns

true if it is possible to narrow the width of a scalar binop feeding a G_AND instruction \p MI.

bool matchNotCmp(
    llvm::MachineInstr& MI,
    SmallVectorImpl<llvm::Register>& RegsToNegate)

Description

Combine inverting a result of a compare into the opposite cond code.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:528

Parameters

llvm::MachineInstr& MI
SmallVectorImpl<llvm::Register>& RegsToNegate

bool matchOperandIsKnownToBeAPowerOfTwo(
    llvm::MachineInstr& MI,
    unsigned int OpIdx)

Description

Check if operand \p OpIdx is known to be a power of 2.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:477

Parameters

llvm::MachineInstr& MI
unsigned int OpIdx

bool matchOperandIsUndef(llvm::MachineInstr& MI,
                         unsigned int OpIdx)

Description

Check if operand \p OpIdx is undef.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:474

Parameters

llvm::MachineInstr& MI
unsigned int OpIdx

bool matchOperandIsZero(llvm::MachineInstr& MI,
                        unsigned int OpIdx)

Description

Check if operand \p OpIdx is zero.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:471

Parameters

llvm::MachineInstr& MI
unsigned int OpIdx

bool matchOptBrCondByInvertingCond(
    llvm::MachineInstr& MI,
    llvm::MachineInstr*& BrCond)

Description

If a brcond's true block is not the fallthrough, make it so by inverting the condition and swapping operands.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:216

Parameters

llvm::MachineInstr& MI
llvm::MachineInstr*& BrCond

bool matchOrShiftToFunnelShift(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:593

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchOverlappingAnd(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Fold and(and(x, C1), C2) -> C1 &C 2 ? and(x, C1 &C 2) : 0

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:504

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchPtrAddImmedChain(
    llvm::MachineInstr& MI,
    llvm::PtrAddChain& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:291

Parameters

llvm::MachineInstr& MI
llvm::PtrAddChain& MatchInfo

bool matchPtrAddZero(llvm::MachineInstr& MI)

Description

Combine G_PTR_ADD with nullptr to G_INTTOPTR

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:540

Parameters

llvm::MachineInstr& MI

bool matchReassocConstantInnerLHS(
    llvm::GPtrAdd& MI,
    llvm::MachineInstr* LHS,
    llvm::MachineInstr* RHS,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:629

Parameters

llvm::GPtrAdd& MI
llvm::MachineInstr* LHS
llvm::MachineInstr* RHS
llvm::BuildFnTy& MatchInfo

bool matchReassocConstantInnerRHS(
    llvm::GPtrAdd& MI,
    llvm::MachineInstr* RHS,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:624

Parameters

llvm::GPtrAdd& MI
llvm::MachineInstr* RHS
llvm::BuildFnTy& MatchInfo

bool matchReassocFoldConstantsInSubTree(
    llvm::GPtrAdd& MI,
    llvm::MachineInstr* LHS,
    llvm::MachineInstr* RHS,
    llvm::BuildFnTy& MatchInfo)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:626

Parameters

llvm::GPtrAdd& MI
llvm::MachineInstr* LHS
llvm::MachineInstr* RHS
llvm::BuildFnTy& MatchInfo

bool matchReassocPtrAdd(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Reassociate pointer calculations with G_ADD involved, to allow better addressing mode usage.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:633

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchRedundantAnd(
    llvm::MachineInstr& MI,
    llvm::Register& Replacement)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:513

Parameters

llvm::MachineInstr& MI
- The G_AND instruction.
llvm::Register& Replacement
- A register the G_AND should be replaced with on success.

Returns

true if \p MI is a G_AND instruction whose operands are x and y where x & y == x or x & y == y. (E.g., one of operands is all-ones value.)

bool matchRedundantNegOperands(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Transform (fadd x, fneg(y)) -> (fsub x, y) (fadd fneg(x), y) -> (fsub y, x) (fsub x, fneg(y)) -> (fadd x, y) (fmul fneg(x), fneg(y)) -> (fmul x, y) (fdiv fneg(x), fneg(y)) -> (fdiv x, y) (fmad fneg(x), fneg(y), z) -> (fmad x, y, z) (fma fneg(x), fneg(y), z) -> (fma x, y, z)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:684

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchRedundantOr(llvm::MachineInstr& MI,
                      llvm::Register& Replacement)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:522

Parameters

llvm::MachineInstr& MI
- The G_OR instruction.
llvm::Register& Replacement
- A register the G_OR should be replaced with on success.

Returns

true if \p MI is a G_OR instruction whose operands are x and y where x | y == x or x | y == y. (E.g., one of operands is all-zeros value.)

bool matchRedundantSExtInReg(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:525

Parameters

llvm::MachineInstr& MI

Returns

true if \p MI is a G_SEXT_INREG that can be erased.

bool matchRotateOutOfRange(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:596

Parameters

llvm::MachineInstr& MI

bool matchSelectSameVal(llvm::MachineInstr& MI)

Description

Optimize (cond ? x : x) -> x

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:465

Parameters

llvm::MachineInstr& MI

bool matchSelectToLogical(
    llvm::MachineInstr& MI,
    llvm::BuildFnTy& MatchInfo)

Description

Fold boolean selects to logical operations.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:735

Parameters

llvm::MachineInstr& MI
llvm::BuildFnTy& MatchInfo

bool matchSextInRegOfLoad(
    llvm::MachineInstr& MI,
    std::tuple<Register, unsigned int>& MatchInfo)

Description

Match sext_inreg(load p), imm -> sextload p

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:206

Parameters

llvm::MachineInstr& MI
std::tuple<Register, unsigned int>& MatchInfo

bool matchSextTruncSextLoad(
    llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:202

Parameters

llvm::MachineInstr& MI

bool matchShiftImmedChain(
    llvm::MachineInstr& MI,
    llvm::RegisterImmPair& MatchInfo)

Description

Fold (shift (shift base, x), y) -> (shift base (x+y))

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:295

Parameters

llvm::MachineInstr& MI
llvm::RegisterImmPair& MatchInfo

bool matchShiftOfShiftedLogic(
    llvm::MachineInstr& MI,
    llvm::ShiftOfShiftedLogic& MatchInfo)

Description

If we have a shift-by-constant of a bitwise logic op that itself has a shift-by-constant operand with identical opcode, we may be able to convert that into 2 independent shifts followed by the logic op.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:301

Parameters

llvm::MachineInstr& MI
llvm::ShiftOfShiftedLogic& MatchInfo

bool matchSimplifyAddToSub(
    llvm::MachineInstr& MI,
    std::tuple<Register, Register>& MatchInfo)

Description

Return true if MI is a G_ADD which can be simplified to a G_SUB.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:483

Parameters

llvm::MachineInstr& MI
std::tuple<Register, Register>& MatchInfo

bool matchTruncStoreMerge(
    llvm::MachineInstr& MI,
    llvm::MergeTruncStoresInfo& MatchInfo)

Description

Match a pattern where a wide type scalar value is stored by several narrow stores. Fold it into a single store or a BSWAP and a store if the targets supports it. Assuming little endian target: i8 *p = ... i32 val = ... p[0] = (val >> 0) & 0xFF; p[1] = (val >> 8) & 0xFF; p[2] = (val >> 16) & 0xFF; p[3] = (val >> 24) & 0xFF; => *((i32)p) = val; i8 *p = ... i32 val = ... p[0] = (val >> 24) & 0xFF; p[1] = (val >> 16) & 0xFF; p[2] = (val >> 8) & 0xFF; p[3] = (val >> 0) & 0xFF; => *((i32)p) = BSWAP(val);

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:570

Parameters

llvm::MachineInstr& MI
llvm::MergeTruncStoresInfo& MatchInfo

bool matchUDivByConst(llvm::MachineInstr& MI)

Description

Combine G_UDIV by constant into a multiply by magic constant.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:647

Parameters

llvm::MachineInstr& MI

bool matchUMulHToLShr(llvm::MachineInstr& MI)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:651

Parameters

llvm::MachineInstr& MI

bool matchUndefSelectCmp(llvm::MachineInstr& MI)

Description

Return true if a G_SELECT instruction \p MI has an undef comparison.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:432

Parameters

llvm::MachineInstr& MI

bool matchUndefShuffleVectorMask(
    llvm::MachineInstr& MI)

Description

Return true if a G_SHUFFLE_VECTOR instruction \p MI has an undef mask.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:426

Parameters

llvm::MachineInstr& MI

bool matchUndefStore(llvm::MachineInstr& MI)

Description

Return true if a G_STORE instruction \p MI is storing an undef value.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:429

Parameters

llvm::MachineInstr& MI

bool matchXorOfAndWithSameReg(
    llvm::MachineInstr& MI,
    std::pair<Register, Register>& MatchInfo)

Description

Fold (xor (and x, y), y) -> (and (not x), y) {

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:533

Parameters

llvm::MachineInstr& MI
std::pair<Register, Register>& MatchInfo

bool reassociationCanBreakAddressingModePattern(
    llvm::MachineInstr& PtrAdd)

Description

Examines the G_PTR_ADD instruction \p PtrAdd and determines if performing a re-association of its operands would break an existing legal addressing mode that the address computation currently represents.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:787

Parameters

llvm::MachineInstr& PtrAdd

bool replaceInstWithConstant(
    llvm::MachineInstr& MI,
    llvm::APInt C)

Description

Replace an instruction with a G_CONSTANT with value \p C.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:445

Parameters

llvm::MachineInstr& MI
llvm::APInt C

bool replaceInstWithConstant(
    llvm::MachineInstr& MI,
    int64_t C)

Description

Replace an instruction with a G_CONSTANT with value \p C.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:442

Parameters

llvm::MachineInstr& MI
int64_t C

bool replaceInstWithFConstant(
    llvm::MachineInstr& MI,
    double C)

Description

Replace an instruction with a G_FCONSTANT with value \p C.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:439

Parameters

llvm::MachineInstr& MI
double C

bool replaceInstWithUndef(llvm::MachineInstr& MI)

Description

Replace an instruction with a G_IMPLICIT_DEF.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:448

Parameters

llvm::MachineInstr& MI

void replaceOpcodeWith(
    llvm::MachineInstr& FromMI,
    unsigned int ToOpcode) const

Description

Replace the opcode in instruction with a new opcode and inform the observer of the changes.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:155

Parameters

llvm::MachineInstr& FromMI
unsigned int ToOpcode

void replaceRegOpWith(
    llvm::MachineRegisterInfo& MRI,
    llvm::MachineOperand& FromRegOp,
    llvm::Register ToReg) const

Description

Replace a single register operand with a new register and inform the observer of the changes.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:150

Parameters

llvm::MachineRegisterInfo& MRI
llvm::MachineOperand& FromRegOp
llvm::Register ToReg

void replaceRegWith(
    llvm::MachineRegisterInfo& MRI,
    llvm::Register FromReg,
    llvm::Register ToReg) const

Description

MachineRegisterInfo::replaceRegWith() and inform the observer of the changes

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:146

Parameters

llvm::MachineRegisterInfo& MRI
llvm::Register FromReg
llvm::Register ToReg

bool replaceSingleDefInstWithOperand(
    llvm::MachineInstr& MI,
    unsigned int OpIdx)

Description

Delete \p MI and replace all of its uses with its \p OpIdx-th operand.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:451

Parameters

llvm::MachineInstr& MI
unsigned int OpIdx

bool replaceSingleDefInstWithReg(
    llvm::MachineInstr& MI,
    llvm::Register Replacement)

Description

Delete \p MI and replace all of its uses with \p Replacement.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:454

Parameters

llvm::MachineInstr& MI
llvm::Register Replacement

void setRegBank(llvm::Register Reg,
                const llvm::RegisterBank* RegBank)

Description

Set the register bank of \p Reg. Does nothing if the RegBank is null. This is the counterpart to getRegBank.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:167

Parameters

llvm::Register Reg
const llvm::RegisterBank* RegBank

bool tryCombine(llvm::MachineInstr& MI)

Description

Try to transform \p MI by using all of the above combine functions. Returns true if changed.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:656

Parameters

llvm::MachineInstr& MI

bool tryCombineConcatVectors(
    llvm::MachineInstr& MI)

Description

If \p MI is G_CONCAT_VECTORS, try to combine it. Returns true if MI changed. Right now, we support: - concat_vector(undef, undef) => undef - concat_vector(build_vector(A, B), build_vector(C, D)) => build_vector(A, B, C, D)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:227

Parameters

llvm::MachineInstr& MI

bool tryCombineCopy(llvm::MachineInstr& MI)

Description

If \p MI is COPY, try to combine it. Returns true if MI changed.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:171

Parameters

llvm::MachineInstr& MI

bool tryCombineExtendingLoads(
    llvm::MachineInstr& MI)

Description

If \p MI is extend that consumes the result of a load, try to combine it. Returns true if MI changed.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:189

Parameters

llvm::MachineInstr& MI

bool tryCombineIndexedLoadStore(
    llvm::MachineInstr& MI)

Description

Combine \p MI into a pre-indexed or post-indexed load/store operation if legal and the surrounding code makes it useful.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:198

Parameters

llvm::MachineInstr& MI

bool tryCombineMemCpyFamily(
    llvm::MachineInstr& MI,
    unsigned int MaxLen = 0)

Description

Optimize memcpy intrinsics et al, e.g. constant len calls. /p MaxLen if non-zero specifies the max length of a mem libcall to inline. For example (pre-indexed): $addr = G_PTR_ADD $base, $offset [...] $val = G_LOAD $addr [...] $whatever = COPY $addr --> $val, $addr = G_INDEXED_LOAD $base, $offset, 1 (IsPre) [...] $whatever = COPY $addr or (post-indexed): G_STORE $val, $base [...] $addr = G_PTR_ADD $base, $offset [...] $whatever = COPY $addr --> $addr = G_INDEXED_STORE $val, $base, $offset [...] $whatever = COPY $addr

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:289

Parameters

llvm::MachineInstr& MI
unsigned int MaxLen = 0

bool tryCombineShiftToUnmerge(
    llvm::MachineInstr& MI,
    unsigned int TargetShiftAmount)

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:324

Parameters

llvm::MachineInstr& MI
unsigned int TargetShiftAmount

bool tryCombineShuffleVector(
    llvm::MachineInstr& MI)

Description

Try to combine G_SHUFFLE_VECTOR into G_CONCAT_VECTORS. Returns true if MI changed.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:246

Parameters

llvm::MachineInstr& MI

bool tryEmitMemcpyInline(llvm::MachineInstr& MI)

Description

Emit loads and stores that perform the given memcpy. Assumes \p MI is a G_MEMCPY_INLINE TODO: implement dynamically sized inline memcpy, and rename: s/bool tryEmit/void emit/

Declared at: llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h:662

Parameters

llvm::MachineInstr& MI