class X86Subtarget

Declaration

class X86Subtarget : public X86GenSubtargetInfo { /* full declaration omitted */ };

Description

TargetSubtargetInfo - Generic base class for all target subtargets. All Target-specific options that control code generation and printing should be exposed through a TargetSubtargetInfo-derived class.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:52

Inherits from: X86GenSubtargetInfo

Member Variables

private PICStyles::Style PICStyle
Which PIC style to use
private const llvm::TargetMachine& TM
private llvm::X86Subtarget::X86SSEEnum X86SSELevel = NoSSE
SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported.
private llvm::X86Subtarget::X863DNowEnum X863DNowLevel = NoThreeDNow
MMX, 3DNow, 3DNow Athlon, or none supported.
private bool IsAtom = false
private bool Is16Bit = false
private bool Is32Bit = false
private bool HasX86_64 = false
private bool Is64Bit = false
private bool HasADX = false
private bool HasAES = false
private bool HasAMXBF16 = false
private bool HasAMXINT8 = false
private bool HasAMXTILE = false
private bool HasBF16 = false
private bool HasBITALG = false
private bool HasBWI = false
private bool HasCDI = false
private bool HasDQI = false
private bool HasERI = false
private bool HasFP16 = false
private bool HasIFMA = false
private bool HasPFI = false
private bool HasVBMI = false
private bool HasVBMI2 = false
private bool HasVLX = false
private bool HasVNNI = false
private bool HasVP2INTERSECT = false
private bool HasVPOPCNTDQ = false
private bool HasAVXVNNI = false
private bool HasBMI = false
private bool HasBMI2 = false
private bool HasBranchFusion = false
private bool HasCLDEMOTE = false
private bool HasCLFLUSHOPT = false
private bool HasCLWB = false
private bool HasCLZERO = false
private bool HasCMOV = false
private bool HasCRC32 = false
private bool HasCX16 = false
private bool HasCX8 = false
private bool HasENQCMD = false
private bool HasERMSB = false
private bool HasF16C = false
private bool HasGETMANTFalseDeps = false
private bool HasLZCNTFalseDeps = false
private bool HasMULCFalseDeps = false
private bool HasMULLQFalseDeps = false
private bool HasPERMFalseDeps = false
private bool HasPOPCNTFalseDeps = false
private bool HasRANGEFalseDeps = false
private bool HasFast11ByteNOP = false
private bool HasFast15ByteNOP = false
private bool HasFast7ByteNOP = false
private bool HasFastBEXTR = false
private bool HasFastGather = false
private bool HasFastHorizontalOps = false
private bool HasFastLZCNT = false
private bool HasFastMOVBE = false
private bool HasFastScalarFSQRT = false
private bool HasFastScalarShiftMasks = false
private bool HasFastSHLDRotate = false
private bool HasFastVariableCrossLaneShuffle = false
private bool HasFastVariablePerLaneShuffle = false
private bool HasFastVectorFSQRT = false
private bool HasFastVectorShiftMasks = false
private bool HasFMA = false
private bool HasFMA4 = false
private bool HasFSGSBase = false
private bool HasFSRM = false
private bool HasFXSR = false
private bool HasGFNI = false
private bool HardenSlsIJmp = false
private bool HardenSlsRet = false
private bool HasHRESET = false
private bool HasSlowDivide32 = false
private bool HasSlowDivide64 = false
private bool HasINVPCID = false
private bool HasKL = false
private bool UseLeaForSP = false
private bool LeaUsesAG = false
private bool UseLVIControlFlowIntegrity = false
private bool UseLVILoadHardening = false
private bool HasLWP = false
private bool HasLZCNT = false
private bool HasMacroFusion = false
private bool HasMOVBE = false
private bool HasMOVDIR64B = false
private bool HasMOVDIRI = false
private bool HasMWAITX = false
private bool HasNOPL = false
private bool PadShortFunctions = false
private bool HasPCLMUL = false
private bool HasPCONFIG = false
private bool HasPKU = false
private bool HasPOPCNT = false
private bool Prefer128Bit = false
private bool Prefer256Bit = false
private bool PreferMaskRegisters = false
private bool HasPREFETCHWT1 = false
private bool HasPRFCHW = false
private bool HasPTWRITE = false
private bool HasRDPID = false
private bool HasRDPRU = false
private bool HasRDRAND = false
private bool HasRDSEED = false
private bool DeprecatedUseRetpoline = false
private bool UseRetpolineExternalThunk = false
private bool UseRetpolineIndirectBranches = false
private bool UseRetpolineIndirectCalls = false
private bool HasRTM = false
private bool HasLAHFSAHF64 = false
private bool HasSBBDepBreaking = false
private bool HasSERIALIZE = false
private bool UseSpeculativeExecutionSideEffectSuppression = false
private bool HasSGX = false
private bool HasSHA = false
private bool HasSHSTK = false
private bool Slow3OpsLEA = false
private bool SlowIncDec = false
private bool SlowLEA = false
private bool IsPMADDWDSlow = false
private bool IsPMULLDSlow = false
private bool IsSHLDSlow = false
private bool SlowTwoMemOps = false
private bool IsUnalignedMem16Slow = false
private bool IsUnalignedMem32Slow = false
private bool UseSoftFloat = false
private bool HasSSEUnalignedMem = false
private bool HasSSE4A = false
private bool AllowTaggedGlobals = false
private bool HasTBM = false
private bool HasTSXLDTRK = false
private bool HasUINTR = false
private bool UseGLMDivSqrtCosts = false
private bool UseSLMArithCosts = false
private bool HasVAES = false
private bool HasVPCLMULQDQ = false
private bool InsertVZEROUPPER = false
private bool HasWAITPKG = false
private bool HasWBNOINVD = false
private bool HasWIDEKL = false
private bool HasX87 = false
private bool HasXOP = false
private bool HasXSAVE = false
private bool HasXSAVEC = false
private bool HasXSAVEOPT = false
private bool HasXSAVES = false
private llvm::Align stackAlignment = llvm::Align(4)
The minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function.
private llvm::Align TileConfigAlignment = llvm::Align(4)
private unsigned int MaxInlineSizeThreshold = 128
Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
private llvm::Triple TargetTriple
What processor and OS we're targeting.
private std::unique_ptr<CallLowering> CallLoweringInfo
GlobalISel related APIs.
private std::unique_ptr<LegalizerInfo> Legalizer
private std::unique_ptr<RegisterBankInfo> RegBankInfo
private std::unique_ptr<InstructionSelector> InstSelector
private llvm::MaybeAlign StackAlignOverride
Override the stack alignment.
private unsigned int PreferVectorWidthOverride
Preferred vector width from function attribute.
private unsigned int PreferVectorWidth = (4294967295U)
Resolved preferred vector width from function attribute and subtarget features.
private unsigned int RequiredVectorWidth
Required vector width from function attribute.
private llvm::X86SelectionDAGInfo TSInfo
private llvm::X86InstrInfo InstrInfo
private llvm::X86TargetLowering TLInfo
private llvm::X86FrameLowering FrameLowering

Method Overview

Inherited from X86GenSubtargetInfo:

Inherited from TargetSubtargetInfo:

Inherited from MCSubtargetInfo:

Methods

void ParseSubtargetFeatures(
    llvm::StringRef CPU,
    llvm::StringRef TuneCPU,
    llvm::StringRef FS)

Description

ParseSubtargetFeatures - Parses features string setting specified subtarget options. Definition of function is auto generated by tblgen.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:156

Parameters

llvm::StringRef CPU
llvm::StringRef TuneCPU
llvm::StringRef FS

X86Subtarget(
    const llvm::Triple& TT,
    llvm::StringRef CPU,
    llvm::StringRef TuneCPU,
    llvm::StringRef FS,
    const llvm::X86TargetMachine& TM,
    llvm::MaybeAlign StackAlignOverride,
    unsigned int PreferVectorWidthOverride,
    unsigned int RequiredVectorWidth)

Description

This constructor initializes the data members to match that of the specified triple.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:119

Parameters

const llvm::Triple& TT
llvm::StringRef CPU
llvm::StringRef TuneCPU
llvm::StringRef FS
const llvm::X86TargetMachine& TM
llvm::MaybeAlign StackAlignOverride
unsigned int PreferVectorWidthOverride
unsigned int RequiredVectorWidth

bool canExtendTo512BW() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:247

bool canExtendTo512DQ() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:244

bool canUseCMOV() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:198

bool canUseCMPXCHG16B() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:192

bool canUseCMPXCHG8B() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:191

bool canUseLAHFSAHF() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:226

unsigned char classifyBlockAddressReference()
    const

Description

Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:368

unsigned char classifyGlobalFunctionReference(
    const llvm::GlobalValue* GV) const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:364

Parameters

const llvm::GlobalValue* GV

unsigned char classifyGlobalFunctionReference(
    const llvm::GlobalValue* GV,
    const llvm::Module& M) const

Description

Classify a global function reference for the current subtarget.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:362

Parameters

const llvm::GlobalValue* GV
const llvm::Module& M

unsigned char classifyGlobalReference(
    const llvm::GlobalValue* GV,
    const llvm::Module& M) const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:357

Parameters

const llvm::GlobalValue* GV
const llvm::Module& M

unsigned char classifyGlobalReference(
    const llvm::GlobalValue* GV) const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:359

Parameters

const llvm::GlobalValue* GV

unsigned char classifyLocalReference(
    const llvm::GlobalValue* GV) const

Description

Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:355

Parameters

const llvm::GlobalValue* GV

bool enableEarlyIfConversion() const

Description

Enable the use of the early if conversion pass.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:406

bool enableIndirectBrExpand() const

Description

If we are using indirect thunks, we need to expand indirectbr to avoid it lowering to an actual indirect jump.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:399

bool enableMachineScheduler() const

Description

Enable the MachineScheduler pass for all X86 subtargets.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:404

llvm::TargetSubtargetInfo::AntiDepBreakMode
getAntiDepBreakMode() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:411

const llvm::CallLowering* getCallLowering() const

Description

Methods used by Global ISel

Declared at: llvm/lib/Target/X86/X86Subtarget.h:159

const llvm::X86FrameLowering* getFrameLowering()
    const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:130

const llvm::X86InstrInfo* getInstrInfo() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:128

llvm::InstructionSelector*
getInstructionSelector() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:160

const llvm::LegalizerInfo* getLegalizerInfo()
    const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:161

unsigned int getMaxInlineSizeThreshold() const

Description

Returns the maximum memset / memcpy size that still makes it profitable to inline the call.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:152

PICStyles::Style getPICStyle() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:188

void getPostRAMutations(
    std::vector<
        std::unique_ptr<ScheduleDAGMutation>>&
        Mutations) const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:408

Parameters

std::vector<std::unique_ptr<ScheduleDAGMutation>>& Mutations

unsigned int getPreferVectorWidth() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:237

const llvm::RegisterBankInfo* getRegBankInfo()
    const

Description

If the information for the register banks is available, return it. Otherwise return nullptr.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:162

const llvm::X86RegisterInfo* getRegisterInfo()
    const

Description

getRegisterInfo - If register information is available, return it. If not, return null.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:138

unsigned int getRequiredVectorWidth() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:238

const llvm::X86SelectionDAGInfo*
getSelectionDAGInfo() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:134

llvm::Align getStackAlignment() const

Description

Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:148

const llvm::X86TargetLowering* getTargetLowering()
    const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:124

const llvm::Triple& getTargetTriple() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:268

llvm::Align getTileConfigAlignment() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:143

unsigned int getTileConfigSize() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:142

bool hasAVX() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:205

bool hasAVX2() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:206

bool hasAVX512() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:207

bool hasAnyFMA() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:212

bool hasInt256() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:208

bool hasMFence() const

Description

Use mfence if we have SSE2 or we're on x86-64 (even if we asked for no-sse2). There isn't any reason to disable it if the target processor supports it.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:266

bool hasMMX() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:209

bool hasPrefetchW() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:213

bool hasSSE1() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:199

bool hasSSE2() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:200

bool hasSSE3() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:201

bool hasSSE41() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:203

bool hasSSE42() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:204

bool hasSSEPrefetch() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:220

bool hasSSSE3() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:202

bool hasThreeDNow() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:210

bool hasThreeDNowA() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:211

void initSubtargetFeatures(
    llvm::StringRef CPU,
    llvm::StringRef TuneCPU,
    llvm::StringRef FS)

Declared at: llvm/lib/Target/X86/X86Subtarget.h:170

Parameters

llvm::StringRef CPU
llvm::StringRef TuneCPU
llvm::StringRef FS

llvm::X86Subtarget&
initializeSubtargetDependencies(
    llvm::StringRef CPU,
    llvm::StringRef TuneCPU,
    llvm::StringRef FS)

Description

Initialize the full set of dependencies so we can use an initializer list for X86Subtarget.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:167

Parameters

llvm::StringRef CPU
llvm::StringRef TuneCPU
llvm::StringRef FS

bool isCallingConvWin64(CallingConv::ID CC) const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:327

Parameters

CallingConv::ID CC

bool isLegalToCallImmediateAddr() const

Description

Return true if the subtarget allows calls to immediate address.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:371

bool isOSWindows() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:312

bool isPICStyleGOT() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:318

bool isPICStyleRIPRel() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:319

bool isPICStyleStubPIC() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:321

bool isPositionIndependent() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:325

bool isTarget64BitILP32() const

Description

Is this x86_64 with the ILP32 programming model (x32 ABI)?

Declared at: llvm/lib/Target/X86/X86Subtarget.h:179

bool isTarget64BitLP64() const

Description

Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?

Declared at: llvm/lib/Target/X86/X86Subtarget.h:184

bool isTargetAndroid() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:283

bool isTargetCOFF() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:277

bool isTargetCygMing() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:310

bool isTargetDarwin() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:270

bool isTargetDragonFly() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:272

bool isTargetELF() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:276

bool isTargetFreeBSD() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:271

bool isTargetFuchsia() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:288

bool isTargetGlibc() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:282

bool isTargetKFreeBSD() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:281

bool isTargetLinux() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:280

bool isTargetMCU() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:287

bool isTargetMachO() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:278

bool isTargetNaCl() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:284

bool isTargetNaCl32() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:285

bool isTargetNaCl64() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:286

bool isTargetPS() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:274

bool isTargetSolaris() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:273

bool isTargetWin32() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:316

bool isTargetWin64() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:314

bool isTargetWindowsCoreCLR() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:294

bool isTargetWindowsCygwin() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:298

bool isTargetWindowsGNU() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:302

bool isTargetWindowsItanium() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:306

bool isTargetWindowsMSVC() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:290

bool isXRaySupported() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:261

void setPICStyle(PICStyles::Style Style)

Declared at: llvm/lib/Target/X86/X86Subtarget.h:189

Parameters

PICStyles::Style Style

bool swiftAsyncContextIsDynamicallySet() const

Description

Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.

Declared at: llvm/lib/Target/X86/X86Subtarget.h:375

bool useAVX512Regs() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:253

bool useBWIRegs() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:257

bool useIndirectThunkBranches() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:233

bool useIndirectThunkCalls() const

Declared at: llvm/lib/Target/X86/X86Subtarget.h:230